dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 430

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

CLR
Operation:
0 → D
0 → D
0 → D
Description: Set the A or B accumulator to zero. Data limiting may occur during a parallel write.
Example:
Explanation of Example:
Condition Codes Affected:
Note:
Instruction Fields:
A-86
Operation
CLR
Before Execution
A2
2
(no parallel move)
(one parallel move)
(two parallel reads)
CLR
Prior to execution, the 36-bit A accumulator contains the value $2:3456:789A. Execution of the
CLR A instruction sets the A accumulator to zero, and the saturation value $7FFF is written to mem-
ory.
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
This instruction operates only on the A and B accumulator registers. The CLR.W instruction should
be used to clear any of the other registers (including A and B if desired).
LF
15
— Set if data limiting has occurred during parallel move
— Always cleared
— Always set
— Always cleared
— Always set
— Always cleared
3456
14
A1
*
A
13
*
SR
Operands
12
F
*
MR
DSP56800E Core Reference Manual
11
*
A,X:(R0)+; save A into memory before clearing it
789A
032F
A0
Clear Accumulator
10
*
I1
9
C
1
Assembler Syntax:
CLR
CLR
CLR
I0
8
W
1
SZ
7
Clear 36-bit accumulator and set condition codes.
Also see CLR.W.
After Execution
6
L
A2
0
5
E
D
D
D
U
4
CCR
0000
A1
N
3
(no parallel move)
(one parallel move)
(two parallel reads)
SR
Comments
2
Z
Freescale Semiconductor
V
1
03D5
0000
C
0
A0
CLR