dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 324

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
JTAG and Enhanced On-Chip Emulation (Enhanced OnCE)
The 32-bit transmit and receive registers are memory mapped in the core’s data memory. The core writes
to the transmit register and reads the receive register in parallel via the DSP56800E instruction set, and the
host writes to the receive register and reads the transmit register serially through the JTAG interface.
Communication between these registers and the core can be either polled or interrupt driven. Status bits
indicate when the transmit or the receive portion need servicing. Similarly, interrupts can be enabled
separately for the transmit and receive portions, signalling to the core that the Realtime Data Transfer Unit
should be serviced.
11-12
Serial Output
Serial Input
Figure 11-6. Realtime Data Transfer Unit
DSP56800E Core Reference Manual
Interrupt
TX Data
Status Register
1
1
TXRX
RX Data
Interrupt
RX Data Shifter
TX Data Shifter
32
32
32-bit
32-bit
Data Buses
Core
Freescale Semiconductor

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