MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 95

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

An example flow to execute the erase verification operation is shown in
command write sequence is as follows:
After launching the erase verification command, the FCCF flag in the FxSTAT register will set after the
operation has completed. The number of bus cycles required to execute the erase verification operation is
equal to the number of addresses in the flash array memory plus several bus cycles as measured from the
time the FCBEF flag is cleared until the FCCF flag is set. Upon completion of the erase verification
operation, the FBLANK flag in the FxSTAT register will be set if all addresses in the flash array memory
are verified to be erased. If any address in the flash array memory is not erased, the erase verification
operation will terminate and the FBLANK flag in the FxSTAT register will remain clear.
Freescale Semiconductor
1. Write to an aligned flash block address to start the command write sequence for the erase
2. Write the erase verification command, 0x05, to the FxCMD register.
3. Clear the FCBEF flag in the FxSTAT register by writing a 1 to FCBEF to launch the erase
verification command. The address and data written will be ignored.
verification command.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure
3-10. The erase verification
Memory
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