MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet
MCF51EM256CLL
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MCF51EM256CLL Summary of contents
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MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual Devices Supported: Document Number: MCF51EM256RM ® MCF51EM256 MCF51EM128 Rev. 8 4/2010 ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended ...
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... Detailed Register Addresses and Bit Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 3.2.1 ColdFire Rapid GPIO Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27 3.2.2 ColdFire Interrupt Controller Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27 3.3 RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28 3.4 Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 1 Device Overview Chapter 2 Pins and Connections , 2-23 REFH ...
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... Port F Pin Function Register 1 (PTFPF1 4-26 4.7.12 Port F Pin Function Register 2 (PTFPF2 4-27 4.7.13 LCD Pin Function Register 1 (LCDPF1 4-28 4.7.14 LCD Pin Function Register 2 (LCDPF2 4-29 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Chapter 4 Parallel Input/Output Control Freescale Semiconductor ...
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... Stop4: Low Voltage Detect or BDM Enabled in Stop Mode . . . . . . . . . . . . . . . . . . . . 6-11 6.9 On-Chip Peripheral Modules in Stop and Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11 Resets, Interrupts, and General System Control 7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 5 Rapid GPIO (RGPIO) Chapter 6 Modes of Operation Chapter 7 5 ...
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... Supervisor/User Stack Pointers (A7 and OTHER_A7 8-5 8.2.4 Condition Code Register (CCR 8-5 8.2.5 Program Counter (PC 8-6 8.2.6 Vector Base Register (VBR 8-7 8.2.7 CPU Configuration Register (CPUCR 8-7 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Chapter 8 ColdFire Core Freescale Semiconductor ...
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... Handling of Non-Maskable Level 7 Interrupt Requests . . . . . . . . . . . . . . . . . . . . . . 10-15 10.5 Initialization Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-15 10.6 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-15 10.6.1 Emulation of the HCS08’s 1-Level IRQ Handling . . . . . . . . . . . . . . . . . . . . . . . . . . 10-16 10.6.2 Using INTC_PL6P{7,6} Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-16 10.6.3 More on Software IACKs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-17 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 9 Chapter 10 7 ...
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... MISO — Master Data In, Slave Data Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-5 12.2.4 SS — Slave Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-5 12.3 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-6 12.3.1 SPI in Stop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-6 12.4 Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-6 12.4.1 SPI Control Register 1 (SPIxC1 12-6 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Chapter 11 Internal Clock Source (ICS) Chapter 12 Freescale Semiconductor ...
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... SPI Baud Rate Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-23 13.4.8 Special Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-24 13.4.9 Error Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-25 13.4.10Low Power Mode Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-26 13.4.11SPI Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-27 13.5 Initialization/Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-29 13.5.1 SPI Module Initialization Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-29 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 13 9 ...
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... IIC Address Register 2 (IICA2 15-12 15.3.10IIC SCL Low Time Out Register High (IICSLTH 15-12 15.3.11IIC SCL LowTime Out register Low (IICSLTL 15-12 15.3.12IIC Programmable Input Glitch Filter (IICFLT 15-13 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Chapter 14 Chapter 15 Inter-Integrated Circuit (IIC) Freescale Semiconductor ...
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... Description of Interrupt Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-20 Independent Real Time Clock (IRTC) 17.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-1 17.1.1 IRTC Power Supply Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-1 17.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-3 17.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-4 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 16 Timer/PWM Module(TPM) Chapter 17 11 ...
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... Write Protection Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-39 17.8.3 Tamper Detection Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-40 18.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-1 18.1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-1 18.1.2 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-1 18.1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-2 18.2 External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-2 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Chapter 18 8-Bit Modulo Timer (MTIM) Freescale Semiconductor ...
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... Programming model extension for CF1Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-7 20.4.3 Transpose feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-8 20.5 Initialization Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-9 Analog-to-Digital Converter (ADC16) 21.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-1 21.1.1 ADC Clock Gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 19 16-Bit Modulo Timer (MTIM16) Chapter 20 Chapter 21 13 ...
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... Stop3 Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-37 21.5.12MCU Stop2 Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-38 21.6 Initialization Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-38 21.6.1 ADC Module Initialization Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-39 21.7 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-40 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev 21-6 DDAD ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-6 SSAD ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-6 REFSH ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-7 REFL Freescale Semiconductor ...
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... V , VLL2, V LL1 LL3 24.2.3 Vcap1, Vcap2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-6 24.3 Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-6 24.3.1 LCD Control Register 0 (LCDC0 24-6 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 22 Chapter 23 Voltage Reference (VREF) Chapter 24 LCD Driver Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-6 15 ...
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... Version 1 ColdFire Debug (CF1_DEBUG) 26.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26-1 26.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26-2 26.1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26-3 26.1.3 Modes of Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26-3 26.2 External Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26-5 26.3 Memory Map/Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26-6 26.3.1 Configuration/Status Register (CSR 26-7 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Chapter 25 Chapter 26 Freescale Semiconductor ...
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... A.1 Changes Between Rev. 4 and Rev A-1 A.2 Changes Between Rev. 5 and Rev A-1 A.3 Changes Between Rev. 6 and Rev A-2 A.4 Changes Between Rev. 7 and Rev A-3 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Appendix A Revision History 17 ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Freescale Semiconductor ...
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... These devices are ideal for use in energy meters and monitoring applications. 1.1.2 MCF51EM256 Series Devices The MCF51EM256 series devices are in various packages, as shown in Table 1-1. Package Availability of MCF51EM256 Series Device Number MCF51EM256 MCF51EM128 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 100-Pin LQFP 80-Pin LQFP 1-1. ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 1-2 t Feature MCF51EM256 262144 16384 Yes 100 channels DBG Yes ICS Yes IIC Yes IRQ Yes IRTC Yes VREF Yes Port I SCI1 Yes SCI2 Yes SCI3 Yes Yes Yes Yes No Yes Yes MCF51EM128 131072 8192 100 Yes No Freescale Semiconductor ...
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... IRTC crystal input and possible crystal input to the ICS module 5 Main external crystal input for the ICS module Figure 1-1 shows the connections between the MCF51EM256 series MCU pins and functional units. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Feature MCF51EM256 Yes 2 PDB ...
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... PTF3/LCD39/TX3 PTF2/LCD38/RX3 Clock Check PTF1/LCD37/EXTRIG & Select PTF0/LCD36 Port C: XOSC2 DADP/M[3,0] EXTAL2 AD[7,4] XTAL2 Port A0 or LCD25 DADP/M[2:1] CLKO AD[6:5] XOSC1 EXTAL1 XTAL1 Port A0 or LCD25 CLKO Independent The IRTC separate RTC power domain the LCD controller. V TAMPER BAT Freescale Semiconductor ...
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... RAM (random-access memory) RGPIO (rapid general-purpose input/output) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Function Measures analog voltages bits of resolution. Each ADC has up to four differential and 24 single-ended inputs. Provides single pin debugging interface (part of the V1 ColdFire core) Executes programs, handles interrupts and containes multiply-accumulate hardware (MAC) ...
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... Controls power management across the device These devices incorporate redundant crystal oscillators in separate power domains.One is intended primarily for use by the IRTC, and the other by the CPU and other peripherals. Table 1-4. Versions of On-Chip Modules Module Function Version Freescale Semiconductor ...
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... All accesses that affect the control features of ColdFire processors must be made in supervisor mode and can be accessed only by privileged instructions. The supervisor programming model consists of the registers available in user mode as well as the registers listed in MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Module Chapter 8, “ColdFire Core.” Table 1-5 ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 1-8 Width (bits) Supervisor/User Registers Contents of memory at 0x00_0004 8 Supervisor Registers 16 32 Contents of memory at 0x00_0000 32 32 Chapter 8, “ColdFire Reset Value 1 0xCF1*_**29 1 0x010*0_10*0 Undefined Undefined Undefined Undefined 0x27-- 0x0000_0000 0x0000_0000 Core,” for details of the configurations. Freescale Semiconductor ...
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... CPU supply is down. The “Clock Check & Select” function allows the CPU to check that oscillator outputs are active prior to switching to one of the two as the reference for the ICS. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Optional EREFS EREFSTEN ...
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... COP MTIM2 TPM MTIM3 FFCLK* SYNC* BUSCLK ADC 1 Interrupt ADC 2 BDM LCD Controller ADC 3 ADC 4 OSCOUT1&2 ADACK Figure 1-3. Clock Distribution Diagram TMRCLK2 SPI1 KBI & SPI2 VREG MTIM1 GPIO SPI3 PRACMP1 PDB FLASH IIC PRACMP2 Freescale Semiconductor SCI1 SCI2 SCI3 ...
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... This is an optional output of the device which can be used to deliver any of a number of the on-chip clocks, including the crystal oscillator outputs, bus clock, etc. See Options Register MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 1-6. System Clocks Description and Chapter 17, “ ...
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... If the BDM becomes enabled, the mode switches to one of the bypassed external mode. Entered whenever the MCU enters a stop state. The FLL is disabled, and all ICS clock signals are static except that ICSIRCLK can be active in stop mode under certain conditions. (ICS),” for additional details. Freescale Semiconductor ...
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... MCU enters stop 1.4 ADC Connections The MCF51EM256 series include four separately controllable ADCs. Assignment of device ADC pins is spread over each of the available ADCs as shown in MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor IREFS=1 CLKS=00 FLL Engaged Internal (FEI) FLL Engaged ...
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... Device Overview MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 1-14 Freescale Semiconductor ...
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... Pins not available on the 80-pin LQFP are automatically disabled for reduced current consumption. No user interaction is needed. Software access to the functions on these pins will be ignored. the pinout of the 80-pin LQFP. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Figure 2-1 shows 2-1 ...
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... LQFP package. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 2-2 80 LQFP Figure 2-1. 80-Pin LQFP Pinout 60 PTE7/LCD5 59 PTC7/LCD4 58 PTC6/LCD3/PRACMP2P5 57 PTC5/LCD2/PRACMP1P4 56 PTC4/LCD1/PRACMP2O 55 PTC3/LCD0/PRACMP1O 54 BKGD/MS/PTC2 53 PTC1/KBI1P7/XTAL2/TX3 52 PTC0/KBI1P6/EXTAL2/RX3 51 RESET 50 PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 49 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 48 PTB5/RGPIO13/SDA/PRACMP2P3 47 PTB4/RGPIO12/SCL/PRACMP2P2 46 PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1 45 PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1 PTB1/RGPIO9/KBI1P1/SS3/TX2 41 PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2 Freescale Semiconductor ...
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... PTF6/LCD42/AD18 18 PTF7/LCD43/AD19 DDA V 21 REFH DADP0 22 DADM0 23 24 AD4 25 DADP1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor 100 LQFP Figure 2-2. 100-Pin LQFP Pinout Pins and Connections PTE7/LCD5 75 PTC7/LCD4 74 73 PTC6/LCD3/PRACMP2P4 72 PTC5/LCD2/PRACMP1P4 PTC4/LCD1/PRACMP2O 71 70 PTC3/LCD0/PRACMP1O 69 BKGD/MS/PTC2 68 PTC1/KBI1P7/XTAL2/TX3 PTC0/KBI1P6/EXTAL2/RX3 ...
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... ALT2 ALT3 LCD27 KBI2P0 LCD28 KBI2P1 LCD29 KBI2P2 LCD30 KBI2P3 LCD31 KBI2P4 TMRCLK1 LCD32 KBI2P5 TMRCLK2 LCD33 KBI2P6 LCD34 KBI2P7 CLKOUT LCD36 LCD37 EXTRIG LCD38 RX3 LCD39 TX3 LCD40 AD16 LCD41 AD17 LCD42 AD18 LCD43 AD19 1 registers. The Comment Freescale Semiconductor ...
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... PTA5/RGPIO5 49 39 PTA6/RGPIO6 50 40 PTA7/RGPIO7 51 — PTE2 52 41 PTB0/RGPIO8 53 42 PTB1/RGPIO9 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor ALT1 ALT2 ALT3 IRQ CLKOUT PRACMP1O AD8 PRACMP1P3 AD9 MOSI1 MISO1 AD10 SCLK1 SS1 TPMCH0 AD11 TPMCH1 AD12 TPMCLK ...
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... Open Drain Open Drain Open Drain RGPIO_ENB is used to select between standard GPIO and RGPIO This pin is an open drain device and has an internal pullup. There is no clamp diode This pin has an internal pullup. PTC2 can only be programmed as an output. Freescale Semiconductor ...
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... The following tables break out pin options on a peripheral by peripheral basis. 1. There is one special case with regard to pullup enable functions. PTA0 can be programmed to operate as IRQ. When in that mode, the pullup enable is controlled via IRQSC[IRQPDD]. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor ALT1 ALT2 ALT3 ...
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... Table 2-2. RGPIO Pinout Summary Composite Pin Name PTA0/RGPIO0/IRQ/CLKOUT PTA1/RGPIO1/MOSI1 PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1 PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1 PTB4/RGPIO12/SCL/PRACMP2P2 PTB5/RGPIO13/SDA/PRACMP2P3 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 PTA2/RGPIO2/MISO1/AD10 PTA3/RGPIO3/SCLK1 PTA4/RGPIO4/SS1 PTA5/RGPIO5/TPMCH0/AD11 PTA6/RGPIO6/TPMCH1/AD12 PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13 PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2 PTB1/RGPIO9/KBI1P1/SS3/TX2 RGPIO RGPIO0 RGPIO1 RGPIO10 RGPIO11 RGPIO12 RGPIO13 RGPIO14 RGPIO15 RGPIO2 RGPIO3 RGPIO4 RGPIO5 RGPIO6 RGPIO7 RGPIO8 RGPIO9 Freescale Semiconductor ...
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... PTB7/RGPIO15 100 LQFP 80 LQFP MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 2-3. PTA Pinout Summary Default Function Composite Pin Name PTA0/RGPIO0 PTA0/RGPIO0/IRQ/CLKOUT PTA1/RGPIO1 PTA1/RGPIO1/MOSI1 PTA2/RGPIO2 PTA2/RGPIO2/MISO1/AD10 PTA3/RGPIO3 PTA3/RGPIO3/SCLK1 PTA4/RGPIO4 PTA4/RGPIO4/SS1 PTA5/RGPIO5 PTA5/RGPIO5/TPMCH0/AD11 PTA6/RGPIO6 PTA6/RGPIO6/TPMCH1/AD12 PTA7/RGPIO7 PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13 Table 2-4. PTB Pinout Summary ...
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... PTD0/LCD27/KBI2P0 PTD0 PTD1/LCD28/KBI2P1 PTD1 PTD2/LCD29/KBI2P2 PTD2 PTD3/LCD30/KBI2P3 PTD3 PTD4 PTD5 PTD6/LCD33/KBI2P6 PTD6 PTD7/LCD34/KBI2P7 PTD7 PTE Comment PTE0 PTE1 PTE2 PTE3 PTE4 Open Drain PTE5 Open Drain PTE6 Open Drain PTE7 PTF PTF0 PTF1 PTF2 PTF3 PTF4 PTF5 PTF6 PTF7 Freescale Semiconductor ...
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... LQFP MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 2-9. KBI1 Pinout Summary Composite Pin Name PTB0/RGPIO8 PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2 PTB1/RGPIO9 PTB1/RGPIO9/KBI1P1/SS3/TX2 PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1 PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 PTC0 PTC0/KBI1P6/EXTAL2/RX3 PTC1 PTC1/KBI1P7/XTAL2/TX3 Table 2-10. KBI2 Pinout Summary Default Composite Pin Name Function ...
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... PTE7 PTE7/LCD5 LCD6 LCD6/MOSI2 LCD7 LCD7/MISO2 LCD8 LCD8/SCLK2 SPI1 MISO1 MOSI1 SCLK1 SS1 SPI2 MISO2 MOSI2 SCLK2 SS2 SPI3 Comment Open Drain SCLK3 Open Drain SS3 SS3 Open Drain LCD LCD0 LCD1 LCD2 LCD3 LCD4 LCD5 LCD6 LCD7 LCD8 Freescale Semiconductor ...
Page 45
... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Default Composite Pin Name Function LCD9 LCD9/SS2 LCD10 LCD10 LCD11 LCD11 LCD12 LCD12 LCD13 LCD13 LCD14 LCD14 LCD15 LCD15 LCD16 LCD16 LCD17 LCD17 LCD18 LCD18 LCD19 LCD19 LCD20 LCD20 LCD21 LCD21 ...
Page 46
... PTF5/LCD41/AD17 PTF6 PTF6/LCD42/AD18 PTF7 PTF7/LCD43/AD19 VCAP1 VCAP1 VCAP2 VCAP2 VLL1 VLL1 VLL2 VLL2 VLL3 VLL3 Table 2-15. IIC Pinout Summary Composite Pin Name PTB4/RGPIO12 PTB4/RGPIO12/SCL/PRACMP2P2 PTB5/RGPIO13 PTB5/RGPIO13/SDA/PRACMP2P3 LCD LCD41 LCD42 LCD43 VCAP1 VCAP2 VLL1 VLL2 VLL3 IIC SCL SDA Freescale Semiconductor ...
Page 47
... Default LQFP LQFP Function 52 41 PTB0/RGPIO8 PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2 53 42 PTB1/RGPIO9 63 PTE6 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 2-16. Other Pinout Summary Composite Pin Name BKGD/MS/PTC2 LCD35/CLKOUT RESET PTF1/LCD37/EXTRIG PTA0/RGPIO0/IRQ/CLKO PTD4/LCD31/KBI2P4/TMRCLK1 PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14 PTD5/LCD32/KBI2P5/TMRCLK2 PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15 V REFO Table 2-17. P/G Pinout Summary ...
Page 48
... Composite Pin Name DADM0 DADM0 DADM1 DADM1 DADM2 DADM2 DADM3 DADM3 DADP0 SCI3 RX3 TX3 RX3 TX3 PRACMP1 PRACMP1O PRACMP1O PRACMP1P0 PRACMP1P1 PRACMP1P2 PRACMP1P3 PRACMP1P4 PRACMP2 PRACMP2O PRACMP2P0 PRACMP2P1 PRACMP2P2 PRACMP2P3 PRACMP2P4 1 ADC DADM0 DADM1 DADM2 DADM3 DADP0 DADP0 Freescale Semiconductor ...
Page 49
... Table 21-1 "ADC Channel Assignments" 100 80 LQFP LQFP Function 48 38 PTA5/RGPIO5 49 39 PTA6/RGPIO6 50 40 PTA7/RGPIO7 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Composite Pin Name DADP1 DADP2 DADP3 V REFH V REFL AD4 AD5 AD6 AD7 PTE0 PTE0/PRACMP1O/AD8 PTE1 PTE1/PRACMP1P3/AD9 ...
Page 50
... RC filter on RESET pin recommended for noisy environments. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 2-18 Table 2-25. IRTC Pinout Summary Default Composite Pin Name Function EXTAL1 EXTAL1 XTAL1 XTAL1 VBAT VBAT TAMPER TAMPER PTC0 PTC0/KBI1P6/EXTAL2/RX3 PTC1 PTC1KBI1P7/XTAL2/TX3 2-3: 1 Freescale Semiconductor ...
Page 51
... OSCILLATOR Optional R 32 kHz or 1–16 MHz F2 OSCILLATOR Electricity Sense Resistor Meter (DAP/M[3:2] are also available) Battery backup for IRTC MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor V REFH V DDA MCF51EM256 PORT SSA V REFL PORT SS1 B V SS2 V cap1 ...
Page 52
... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 2-20 Internal or external reference - + analog comparator RX1/2 digital buffer Note1 0 TX1/2 1 Note2 SIMIPS2[MODTX1] OR [MODTX2] Section 4.7, “Pin Mux Figure 2-4 are discussed in opto isolator opto isolator Off-Chip Opto-Isolators Controls.” Section 7.7.16, “Internal Peripheral Select Freescale Semiconductor ...
Page 53
... C1 and C2 (which are usually the same size first-order approximation, use estimate of combined pin and PCB capacitance for each oscillator pin (EXTAL and XTAL). MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor BAT DD supplies PRACMP ...
Page 54
... Specifically, BKGD must be held low through the first 16 cycles after deassertion of the internal reset. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 2-22 for more information), the BKGD/MS pin functions 1 , which forces the microcontroller to halt mode. Figure 2-3 for an Section 26.3.2, Freescale Semiconductor ...
Page 55
... For information about controlling these pins as general-purpose I/O pins, see “Parallel Input/Output Control.” MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor , V ) REFH REFL Pins and Connections “ ...
Page 56
... Pins and Connections MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 2-24 Freescale Semiconductor ...
Page 57
... Unimplemented 0x(FF)FF_7FFF 0x(FF)FF_8000 Slave Peripherals 0x(FF)FF_FFFF Figure 3-1. MCF51EM256 Series Memory Maps MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor is the generic, high level, memory map applicable to the V1 ColdFire MCF51EM256 Address Range Memory Usage 128 KB Flash 0x(00)00_0000 Memory Array 1 ...
Page 58
... Long x x — — — — — Table 3-2. Instance Name Base Address RGPIO 0x(00)C0_0000 PTA 0x(FF)FF_8000 PTA 0x(FF)FF_8008 PTB 0x(FF)FF_8040 PTB 0x(FF)FF_8048 PTC 0x(FF)FF_8080 PTC 0x(FF)FF_8088 PTD 0x(FF)FF_80C0 PTD 0x(FF)FF_80C8 PTE 0x(FF)FF_8100 PTE 0x(FF)FF_8108 PTF 0x(FF)FF_8140 PTF 0x(FF)FF_8148 Freescale Semiconductor ...
Page 59
... MTIM16 16-Bit Modulo Timer CRC Cyclic Redundancy Check Generator 2-channel TPM 2-channel Timer / PWM Module IRTC Independent Real Time Counter MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Description Memory Instance Name Base Address KBI1 0x(FF)FF_8180 KBI2 0x(FF)FF_81A0 IRQ ...
Page 60
... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-4 Description Chapter 5, “Rapid GPIO (RGPIO),” Locations,” for detailed information. Instance Name Base Address NONE 0x(FF)FF_86A0 LCD 0x(FF)FF_8700 FTSR1 0x(FF)FF_8780 FTSR2 0x(FF)FF_87A0 PDB 0x(FF)FF_E000 INTC 0x(FF)FF_FFC0 for further details on Table 3-2 result in an illegal Freescale Semiconductor ...
Page 61
... PTASET 0x(FF)FF_8003 PTACLR 0x(FF)FF_8004 PTATOG 0x(FF)FF_8005– Reserved 0x(FF)FF_8007 0x(FF)FF_8008 PTAPE MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit DIR[15:8] (Read/Write) DIR[7:0] (Read/Write) DATA[15:8] (Read/Write) DATA[7:0] (Read/Write) ENB[15:8] (Read/Write) ENB[7:0] (Read/Write) CLR[15:8] (Write only) CLR[7:0] (Write only) ...
Page 62
... TOG2 TOG1 TOG0 — — — — PE3 PE2 PE1 PE0 SE3 SE2 SE1 SE0 DS3 DS2 DS1 DS0 IFE3 IFE2 IFE1 IFE0 — — — — DD3 DD2 DD1 DD0 SET3 SET2 SET1 SET0 CLR3 CLR2 CLR1 CLR0 Freescale Semiconductor ...
Page 63
... PTFTOG 0x(FF)FF_8145– Reserved 0x(FF)FF_8147 0x(FF)FF_8148 PTFPE 0x(FF)FF_8149 PTFSE 0x(FF)FF_814A PTFDS 0x(FF)FF_814B PTFIFE 0x(FF)FF_814C– Reserved 0x(FF)FF_817F MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit TOG7 TOG6 TOG5 TOG4 — — — — PE7 PE6 PE5 PE4 ...
Page 64
... IRQF IRQACK IRQIE — — — LCD7 LCD6 0 0 LCD35 — — — IREFS IRCLKEN LP EREFS ERCLKEN EREFSTEN TRIM CLKST OSCINIT — — — Freescale Semiconductor Bit 0 KBIMOD KBIPE0 KBEDG0 — KBIMOD KBIPE0 KBEDG0 — IRQMOD — — IREFSTEN FTRIM — ...
Page 65
... SPMSC2 0x(FF)FF_82A2 Reserved 0x(FF)FF_82A3 SPMSC3 0x(FF)FF_82A4– Reserved 0x(FF)FF_82BF 0x(FF)FF_82C0 SCI1BDH 0x(FF)FF_82C1 SCI1BDL 0x(FF)FF_82C2 SCI1C1 0x(FF)FF_82C3 SCI1C2 0x(FF)FF_82C4 SCI1S1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit — — — — POR PIN COP ILOP 0 0 STOPE ...
Page 66
... SBR1 SBR0 WAKE ILT RWU SBK RWUID BRK13 LBKDE RAF ORIE NEIE FEIE PEIE Bit 0 — — — CPOL CPHA SSOE LSBFE 0 SPISWAI SPC0 SPR3 SPR2 SPR1 SPR0 TXFULLF RFIFOEF RNFULLF TNEAREF Bit Bit Bit Bit 0 Freescale Semiconductor — — — ...
Page 67
... IICC2 0x(FF)FF_8386 IICSMB 0x(FF)FF_8387 IICA2 0x(FF)FF_8388 IICSLTH 0x(FF)FF_8389 IICSLTL 0x(FF)FF_838A IICFLT 0x(FF)FF_838B– Reserved 0x(FF)FF_83BF 0x(FF)FF_83C0 VREFTRM MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit RNFULL TNEAREF 0 0 MARK MARK TXFERR TXFOF RXFOF RXFERR — — — ...
Page 68
... ADICLK ADHSC ADLSTS ADACKEN D[15:8] D[7:0] D[15:8] D[7:0] CV1[15:8] CV1[7:0] CV2[15:8] CV2[[7:0] ACREN 0 REFSEL ADCO ADGE AVGS OFS[15:8] OFS[7:0] PG[15:8] PG[7:0] MG[15:8] MG[7:0] CLPD[5:0] CLPS[5: CLP4[9:8] CLP4[7: CLP3[7:0] CLP2[7:0] CLP1[6:0] CLP0[5:0] — — — Freescale Semiconductor Bit 0 — CLP3[8] — ...
Page 69
... ADC2RHB 0x(FF)FF_8447 ADC2RLB 0x(FF)FF_8448 ADC2CV1H 0x(FF)FF_8449 ADC2CV1L 0x(FF)FF_844A ADC2CV2H 0x(FF)FF_844B ADC2CV2L 0x(FF)FF_844C ADC2SC2 0x(FF)FF_844D ADC2SC3 0x(FF)FF_844E ADC2OFSH 0x(FF)FF_844F ADC2OFSL 0x(FF)FF_8450 ADC2PGH 0x(FF)FF_8451 ADC2PGL MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit — — — — COCOA AIENA ...
Page 70
... CLP4[9:8] CLP4[7: CLP3[7:0] CLP2[7:0] CLP1[6:0] CLP0[5:0] — — — CLMD[5:0] CLMS[5: CLM4[9:8] CLM4[7: CLM3[7:0] CLM2[7:0] CLM1[6:0] CLM0[5:0] — — — ADCHA ADCHB MODE ADICLK ADHSC ADLSTS ADACKEN D[15:8] D[7:0] D[15:8] D[7:0] CV1[15:8] CV1[7:0] Freescale Semiconductor Bit 0 CLP3[8] — CLM3[8] — ...
Page 71
... ADC3CLMS 0x(FF)FF_84A0 ADC3CLM4H 0x(FF)FF_84A1 ADC3CLM4L 0x(FF)FF_84A2 ADC3CLM3H 0x(FF)FF_84A3 ADC3CLM3L 0x(FF)FF_84A4 ADC3CLM2 0x(FF)FF_84A5 ADC3CLM1 0x(FF)FF_84A6 ADC3CLM0 0x(FF)FF_84A7– Reserved 0x(FF)FF_84BF 0x(FF)FF_84C0 ADC4SC1A 0x(FF)FF_84C1 ADC4SC1B MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit ADACT ADTRG ACFE ACFGT CAL CAF ...
Page 72
... D[15:8] D[7:0] D[15:8] D[7:0] CV1[15:8] CV1[7:0] CV2[15:8] CV2[[7:0] ACREN 0 REFSEL ADCO ADGE AVGS OFS[15:8] OFS[7:0] PG[15:8] PG[7:0] MG[15:8] MG[7:0] CLPD[5:0] CLPS[5: CLP4[9:8] CLP4[7: CLP3[7:0] CLP2[7:0] CLP1[6:0] CLP0[5:0] — — — CLMD[5:0] CLMS[5: CLM4[9:8] CLM4[7: Freescale Semiconductor Bit 0 CLP3[8] — CLM3[8] ...
Page 73
... MTIM2SC 0x(FF)FF_8581 MTIM2CLK 0x(FF)FF_8582 MTIM2CNT 0x(FF)FF_8583 MTIM2MOD 0x(FF)FF_8584– Reserved 0x(FF)FF_859F 0x(FF)FF_85A0 MTIM3SC 0x(FF)FF_85A1 MTIM3CLK 0x(FF)FF_85A2 MTIM3CNTH 0x(FF)FF_85A3 MTIM3CNTL MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit — — — — ACEN ACMPF 0 ACOPE 0 ACPSEL PRGEN PRGINS ...
Page 74
... ELS0B ELS0A ELS1B ELS1A — — — YEAR MONTH MONTH (units) 0 DAY_OF_WEEK 0 Value remains unchanged DAYS DAYS (units) HOURS HOURS (units) MINUTES MINUTES (ones) Freescale Semiconductor Bit 0 — — Bit 8 Bit 0 Bit 8 Bit 0 0 Bit 8 Bit 0 0 Bit 8 Bit 0 — ...
Page 75
... IRTC_ISR 0x(FF)FF_8655 0x(FF)FF_8656 IRTC_IER 0x(FF)FF_8657 0x(FF)FF_8658 IRTC_COUNT_DN 0x(FF)FF_8659 0x(FF)FF_865A– Reserved 0x(FF)FF_865F 0x(FF)FF_8660 IRTC_CFG_DATA 0x(FF)FF_8661 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit SECONDS (tens) Value remains in binary as year indicates offset from base year ALM_MONTH (tens) ...
Page 76
... TIME STAMP MONTHS TIME STAMP MONTHS (units TIME STAMP DAY TIME STAMP DAY (units) TIME STAMP HOURS TIME STAMP HOURS (units) TIME STAMP MINUTES TIME STAMP MINUTES (units STATUS 0 0 Value in Binary TIME STAMP SECONDS TIME STAMP SECONDS (units) Freescale Semiconductor Bit 0 0 ...
Page 77
... IRTCRAM13 0x(FF)FF_8690 IRTCRAM14 0x(FF)FF_8692 IRTCRAM15 0x(FF)FF_8694 IRTCRAM16 0x(FF)FF_8696 IRTCRAM17 0x(FF)FF_8698 IRTCRAM18 0x(FF)FF_869A IRTCRAM19 0x(FF)FF_869C IRTCRAM20 0x(FF)FF_869E IRTCRAM21 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit — — — — — — — MSB LSB MSB LSB MSB ...
Page 78
... BPDLCD2 BPCLCD2 BPBLCD2 BPALCD3 BPDLCD3 BPCLCD3 BPBLCD3 BPALCD4 BPDLCD4 BPCLCD4 BPBLCD4 BPALCD5 BPDLCD5 BPCLCD5 BPBLCD5 BPALCD6 BPDLCD6 BPCLCD6 BPBLCD6 BPALCD7 BPDLCD7 BPCLCD7 BPBLCD7 BPALCD8 BPDLCD8 BPCLCD8 BPBLCD8 Freescale Semiconductor Bit 0 — DUTY0 0 PEN0 PEN8 PEN16 PEN24 PEN32 PEN40 — BPEN0 BPEN8 ...
Page 79
... LCDWF35 0x(FF)FF_873A LCDWF36 0x(FF)FF_873B LCDWF37 0x(FF)FF_873C LCDWF38 0x(FF)FF_873D LCDWF39 0x(FF)FF_873E LCDWF40 0x(FF)FF_873F LCDWF41 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit BPELCD9 BPHLCD9 BPFLCD9 BPGLCD9 BPELCD10 BPHLCD10 BPGLCD10 BPFLCD10 BPELCD11 BPHLCD11 BPGLCD11 BPFLCD11 BPELCD12 BPHLCD12 BPGLCD12 BPFLCD12 ...
Page 80
... FBLANK 0 FCMD — — — FDIV 0 0 — — — FBLANK 0 FCMD — — — TRIGSEL IE MOD[15:8] MOD[7:0] COUNT[15:8] COUNT[7:0] IDELAY[15:8] IDELAY[7: BOS ENA DELAY[15:8] DELAY[7:0] Freescale Semiconductor Bit 0 BPALCD42 BPALCD43 — SEC — 0 FPOPEN 0 — SEC — 0 FPOPEN 0 — ENB ...
Page 81
... PDBCH4DLYB 0x(FF)FF_E025 0x(FF)FF_E026– Reserved 0x(FF)FF_FFCF 0x(FF)FF_FFD0 INTC_FRC 0x(FF)FF_FFD8 INTC_PL6P7 0x(FF)FF_FFD9 INTC_PL6P6 0x(FF)FF_FFDB INTC_WCR 0x(FF)FF_FFDE INTC_SFRC 0x(FF)FF_FFDF INTC_CFRC MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Bit DELAY[15:8] DELAY[7:0] RESERVED RESERVED ERRA ERRB AOS DELAY[15:8] DELAY[7:0] DELAY[15:8] DELAY[7:0] — ...
Page 82
... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-26 Bit Figure 3-2. Multi-byte operands (e.g., 16-bit words and Bit 0 VECN VECN VECN VECN VECN VECN VECN VECN Freescale Semiconductor ...
Page 83
... ColdFire interrupt controller definitions. The CF1_INTC occupies the upper 64 bytes of the 4 GB address space and all memory locations are accessed as 8-bit (byte) operands. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Figure 3-2. ColdFire Memory Organization 16 15 ...
Page 84
... Addresses 0x00 – 0x03 0x00 – 0x03 0x04 – 0x07 0x04 – 0x07 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-28 CAUTION Table 3-5. Alternate Bytes Setting Desired Value Values Programmed 0x5555_AAAA 0xCCCC_CCCC ). RAM 0x55FF_AAFF 0xFF55_FFAA 0xCCFF_CCFF 0xFFCC_FFCC Freescale Semiconductor ...
Page 85
... Re-enable interrupts • If desired, re-enable flash speculation by the V1 ColdFire CPU by re-setting CPUCR[FSD • Jump back (using an indirect jump) to main application code residing in the flash memory MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Desired Value Values Programmed 0x12FF_56FF 0x1234_5678 0xFF34_FF78 ...
Page 86
... FDIV = 0x3F). MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-30 Table 3-6. Flash Array Base Address Array MCF51EM256 FTSR1 0x(00)00_0000 FTSR2 0x(00)02_0000 1 FTSR1 FTSR2 0x(00)00_0000 Table 3-7. FxCDIV Field Descriptions Description . . MCF51EM128 0x(00)00_0000 0x(00)01_0000 0x(00)00_0000 2 1 FDIV 0 0 Freescale Semiconductor 0 0 ...
Page 87
... KEYACC, CBEIE and CCIE are readable and writable while all remaining bits read 0 and are not writable. KEYACC is writable only if KEYEN is set to the enabled state (see Register (FxOPT and NVOPT)”). Flash array reads are allowed while KEYACC is set. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Section 3. ...
Page 88
... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev KEYACC Table 3-9. FxCNFG Field Descriptions Description Section 3.4.3.5, “Flash Status Register NOTE Section 3.6, “Flash Module Reserved Figure 3-6. To change the flash protection loaded during the reset Section 3.4.3.5, “Flash Status Register (FxSTAT)”) Freescale Semiconductor ...
Page 89
... FPS — 0x00–0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor 5 4 FPS F F Table 3-10. FxPROT Field Descriptions Description Table 3-11. Flash Protection Address Range Protected Address Range FPOPEN Relative to Flash Array Base 0 0x0_0000– ...
Page 90
... No Protection FPVIOL FACCERR 0 w1c w1c Figure 3-7. Flash Status Register (FxSTAT) Protected Size 112 KB ... ... FBLANK Freescale Semiconductor ...
Page 91
... The FxCMD register is the flash command register. All FxCMD bits are readable and writable during a command write sequence while bit 7 reads 0 and is not writable Reset 0 0 Figure 3-8. Flash Command Register (FxCMD) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 3-12. FxSTAT Field Descriptions Description FCMD Memory Section 3.4.3.6, “Flash ...
Page 92
... FxCDIV[PRDIV8] bit set to 1. The resulting FCLK frequency is then 195 kHz. In this case, the flash program and erase algorithm timings are increased over the optimum target by: MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-36 Table 3-13. FxCMD Field Descriptions Description (200 – 195) ÷ 200 = 3% Figure 3-9. Eqn. 3-1 Freescale Semiconductor ...
Page 93
... FxSTAT[FACCERR] will be set. PRDCLK = bus_clock/8 set FDIV[5:0] = PRDCLK[kHz]/200-1 FCLK = (PRDCLK)/(1+FDIV[5:0]) Figure 3-9. Determination Procedure for PRDIV8 and FDIV Bits MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor CAUTION START PRDIV8 = 0 (reset) yes bus_clock ...
Page 94
... EEPROM emulation applications. 3.4.5.1 Erase Verification Command The erase verification operation will verify that the entire flash array memory is erased. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-38 Section 3.4.3.5). Table 3-14. Flash Command Description Function on Flash Memory CAUTION Freescale Semiconductor ...
Page 95
... If any address in the flash array memory is not erased, the erase verification operation will terminate and the FBLANK flag in the FxSTAT register will remain clear. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Memory Figure 3-10. The erase verification ...
Page 96
... Dummy Data Write: FxCMD register Erase Verify Command 0x05 Write: FxSTAT register Clear FCBEF 0x80 Read: FxSTAT register no FCCF Set? yes no FBLANK Set? yes Flash Block EXIT Erased Figure Flash Block EXIT Not Erased 3-11. The program command write Freescale Semiconductor ...
Page 97
... Check Bit Polling for Command Completion Check Figure 3-11. Example Program Command Flow MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor START Note: FxCDIV needs to no FDIVLD be set after each reset Set? yes Write: FxCDIV register Read: FxSTAT register ...
Page 98
... FCBEF flag in the FxSTAT register has been set, greater than 50% faster programming time for the entire flash array can be effectively achieved when compared to using the basic program command. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-42 Figure 3-12. The burst program Freescale Semiconductor ...
Page 99
... Sequential Programming Decision Bit Polling for Command Completion Check Figure 3-12. Example Burst Program Command Flow MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor START Note: FxCDIV needs to no FDIVLD be set after each reset Set? yes Write: FxCDIV register ...
Page 100
... Once the sector erase command has successfully launched, the FCCF flag in the FxSTAT register will set after the sector erase operation has completed. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-44 Figure 3-13. The sector erase command Freescale Semiconductor ...
Page 101
... If the flash array memory to be mass erased contains any protected area, the FPVIOL flag in the FxSTAT register will set and the mass erase command will not launch. Once the mass erase command has MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor START Note: FxCDIV needs to ...
Page 102
... FCBEF no Set? yes yes Write: FxSTAT register FACCERR/FPVIOL Clear FACCERR/FPVIOL 0x30 Set? no Write: Flash Memory Address and Dummy Data Write: FxCMD register Mass Erase Command 0x41 Write: FxSTAT register Clear FCBEF 0x80 Read: FxSTAT register no FCCF Set? yes EXIT Freescale Semiconductor ...
Page 103
... Writing the sector erase command if the address written in the command write sequence was in a protected area of the flash array. 3. Writing the mass erase command while any flash protection is enabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Mode”). Section 3.4.3.5, “Flash Status Register Memory (FxSTAT)” ...
Page 104
... ON BOTH flash blocks in order for the device to be unsecured. This allows the device to MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-48 Section 3.4.3.5, “Flash Status Register NOTE Table 3-14 can be executed. If the MCU is secured, only the mass erase (FxSTAT)”). Sequence”). Freescale Semiconductor ...
Page 105
... Clear the KEYACC bit. Depending on the user code used to write the backdoor keys, a wait cycle (NOP) may be required before clearing the KEYACC bit. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Access.” Figure 3-15) can also be used, but may not work under Section 3 ...
Page 106
... It is not possible to unsecure the MCU by using the backdoor key access sequence in background debug mode (BDM) because the MCU does not allow flash array writes in BDM to the flash module. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-50 Section 3.6, “Flash Module Reserved Memory Freescale Semiconductor ...
Page 107
... Figure 3-15. Procedure for Clearing Security on MCF51EM256 Series MCUs via the BDM Port 1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor N = number of cycles for SIM to release N = number of cycles for SIM to release internal reset. Adder of 16 imposed by the internal reset ...
Page 108
... ICS xcsr[31:24] != 1000 01-1 xcsr[31:24] != 1000 01-1 STOP STOP error condition error condition check code or device check code or device STOP STOP already unsecured already unsecured xcsr[25]=0 xcsr[25]=0 Table 3-15, are used for storing values used by Freescale Semiconductor ...
Page 109
... The base address of the blocks can be found in register set is loaded in their respective flash registers. When the flash blocks swap, the nonvolatile flash registers also swap following the array. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 3-15. Reserved Flash Locations MSB (0x0) ...
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... Memory MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 3-54 Freescale Semiconductor ...
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... In addition to standard GPIO functionality, Ports A and B are implemented using “Rapid GPIO” functions which are integrated as part of the ColdFire core itself to improve edge resolution on those pins. RGPIO MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor NOTE Chapter 2, “Pins and Connections,” ...
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... The user may select which function “owns” a pin via the Port Section 4.7, “Pin Mux PTA2 PTA1 PTA0 RGPIO2 RGPIO1 RGPIO0 PTB2 PTB1 PTB0 RGPIO10 RGPIO9 RGPIO8 Table 4-4 and Table 4-5 PTB2 PTB1 PTB0 KBI1P2 KBI1P1 KBI1P0 PTD2 PTD1 PTD0 KBI2P2 KBI2P1 KBI2P0 Controls.” Freescale Semiconductor ...
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... The intention here is to allow the device to interface (via off-chip pullup resistors logic. PTE4 can be programmed to MISO3 or MOSI3. PTE5 can be programmed to SCLK3. PTE6 can be programmed as SS3 or TX2. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor NOTE Parallel Input/Output Control 4-3 ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 4-4 4-1) control pullups, slew rate, drive strength and input filter enables PTxPE[n] PTxSE[n] PTxDS[n] PTxIFE[n] NOTE Port Pullpullupup Enable Port Slew Rate Control Port Drive Strength Control Port Input Filter Enable Freescale Semiconductor ...
Page 115
... Chapter 3, “Memory,” for the absolute address assignments for all registers. This section refers to registers and control bits only by their names. A Freescale Semiconductor-provided equate or header file normally is used to translate these names into the appropriate absolute addresses. 4.2.2.1 Port x Pull Enable Register (PTxPE) An internal pullup device can be enabled for each port pin by setting the corresponding bit in the pullup enable register (PTxPE[n]) ...
Page 116
... High output drive strength selected for Port x bit n. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 4-6 NOTE PTxSE5 PTxSE4 PTxSE3 Table 4-8. PTxSE Field Descriptions Description NOTE PTxDS5 PTxDS4 PTxDS3 Table 4-9. PTxDS Field Descriptions Description PTxSE2 PTxSE1 PTxSE0 PTxDS2 PTxDS1 PTxDS0 Freescale Semiconductor ...
Page 117
... Writing to the port data register before changing the direction of a port pin to an output ensures that the pin is not driven momentarily with an old data value in the port data register. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor ...
Page 118
... Chapter 3, “Memory,” for the absolute address assignments for all registers. This section refers to registers and control bits only by their names. A Freescale Semiconductor-provided equate or header file normally is used to translate these names into the appropriate absolute addresses. 4.3.2.1 Port x Data Register (PTxD) The data register of each port allows software to interact with the pins of the chip ...
Page 119
... Setting a PTxSET bit, sets the corresponding bit of the port data register, PTxD PTxSET bit is cleared the corresponding bit in the port data register is unchanged. Writes to PTxSET only cause the PTxD to change. Subsequent writes to PTxD, PTxCLR, or PTxTOG have their own effect in changing the PTxD register. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor PTxD5 ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev PTxSET5 PTxSET4 PTxSET3 Figure 4-9. Port x SET Register (PTxSET) Table 4-14. PTxSET Field Descriptions Description PTxCLR5 PTxCLR4 PTxCLR3 Table 4-15. PTxCLR Field Descriptions Description PTxTOG5 PTxTOG4 PTxTOG3 PTxSET2 PTxSET1 PTxSET0 PTxCLR2 PTxCLR1 PTxCLR0 PTxTOG2 PTxTOG1 PTxTOG0 Freescale Semiconductor ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-16. PTxTOG Field Descriptions Description Chapter 5, “Rapid GPIO (RGPIO).” ...
Page 122
... This section refers to registers and control bits only by their names. A Freescale Semiconductor-provided equate or header file normally is used to translate these names into the appropriate absolute addresses. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 4-12 Table 4-17 ...
Page 123
... Figure 4-14. KBIx Interrupt Pin Select Register (KBIxPE) Field 7–0 KBIx Interrupt Pin Selects — Each of the KBIPEn bits enable the corresponding KBIx interrupt pin. KBIPEn 0 Pin not enabled as interrupt. 1 Pin enabled as interrupt. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor KBF 0 ...
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... In stop3 and stop4 modes, all I/O is maintained because internal logic circuity stays powered. After recovery, normal I/O function is available to the user. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev KBEDG5 KBEDG4 KBEDG3 Table 4-20. KBIxES Field Descriptions Description KBEDG2 KBEDG1 KBEDG0 Freescale Semiconductor ...
Page 125
... Configuring the mux control registers to the ADC pins disables the digital function of the pin to ensure proper ADC conversion. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 2-2. That is, default functions are assigned value Table 4-21. Pin Mux Control Registers ...
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... Port A6 Pin Mux Controls PTA6/RGPIO6 01 TPMCH1 10 Reserved 11 AD12 3–2 Port A5 Pin Mux Controls PTA5/RGPIO5 01 TPMCH0 10 Reserved 11 AD11 1–0 Port A4 Pin Mux Controls PTA4/RGPIO4 01 SS1 10 Reserved 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 4-22. PTAPF1 Field Descriptions Description Freescale Semiconductor 0 0 ...
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... PTA2/RGPIO2 01 MISO1 10 Reserved 11 AD10 3–2 Port A1 Pin Mux Controls PTA1/RGPIO1 01 MOSI1 10 Reserved 11 Reserved 1–0 Port A0 Pin Mux Controls PTA0/RGPIO0 01 IRQ 10 CLKOUT 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-23. PTAPF2 Field Descriptions Description Parallel Input/Output Control ...
Page 128
... Port B6 Pin Mux Controls PTB6/RGPIO14 01 KBI1P4 10 TMRCLK1 11 AD14 3–2 Port B5 Pin Mux Controls PTB5/RGPIO13 01 SDA 10 PRACMP2P3 11 Reserved 1–0 Port B4 Pin Mux Controls PTB4/RGPIO12 01 SCL 10 PRACMP2P2 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 4-24. PTBPF1 Field Descriptions Description Freescale Semiconductor 0 0 ...
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... PTB2/RGPIO10 01 KBI1P2 10 PRACMP1P0 11 RX1 3–2 Port B1 Pin Mux Controls PTB1/RGPIO9 01 KBI1P1 10 SS3 11 TX2 1–0 Port B0 Pin Mux Controls PTB0/RGPIO8 01 KBI1P0 10 PRACMP2P0 11 RX2 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-25. PTBPF2 Field Descriptions Description Parallel Input/Output Control ...
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... Port C6 Pin Mux Controls PTC6 01 LCD3 10 Reserved 11 PRACMP2P4 3–2 Port C5 Pin Mux Controls PTC5 01 LCD2 10 Reserved 11 PRACMP1P4 1–0 Port C4 Pin Mux Controls PTC4 01 LCD1 10 PRACMP2O 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 4-26. PTCPF1 Field Descriptions Description Freescale Semiconductor 0 0 ...
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... BKGD/MS 01 PTC2 10 Reserved 11 Reserved 3–2 Port C1 Pin Mux Controls PTC1 01 KBI1P7 10 XTAL2 11 TX3 1–0 Port C0 Pin Mux Controls PTC0 01 KBI1P6 10 EXTAL2 11 RX3 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-27. PTCPF2 Field Descriptions Description Parallel Input/Output Control ...
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... Port D6 Pin Mux Controls PTD6 01 LCD33 10 KBI2P6 11 Reserved 3–2 Port D5 Pin Mux Controls PTD5 01 LCD32 10 KBI2P5 11 TMRCLK2 1–0 Port D4 Pin Mux Controls PTD4 01 LCD31 10 KBI2P4 11 TMRCLK1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 4-28. PTDPF1 Field Descriptions Description Freescale Semiconductor 0 0 ...
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... PTD2 01 LCD29 10 KBI2P2 11 Reserved 3–2 Port D1 Pin Mux Controls PTD1 01 LCD28 10 KBI2P1 11 Reserved 1–0 Port D0 Pin Mux Controls PTD0 01 LCD27 10 KBI2P0 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-29. PTDPF2 Field Descriptions Description Parallel Input/Output Control ...
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... Port E6 Pin Mux Controls PTE6 01 SS3 10 SS3 11 TX2 3–2 Port E5 Pin Mux Controls PTE5 01 SCLK3 10 SCLK3 11 Reserved 1–0 Port E4 Pin Mux Controls PTE4 01 MISO3 10 MOSI3 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 4-30. PTEPF1 Field Descriptions Description Freescale Semiconductor 0 0 ...
Page 135
... PTE2 01 Reserved 10 PRACMP1P1 11 Reserved 3–2 Port E1 Pin Mux Controls PTE1 01 Reserved 10 PRACMP1P3 11 AD9 1–0 Port E0 Pin Mux Controls PTE0 01 Reserved 10 PRACMP1O 11 AD8 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-31. PTEPF2 Field Descriptions Description Parallel Input/Output Control ...
Page 136
... Port F6 Pin Mux Controls PTF6 01 LCD42 10 Reserved 11 AD18 3–2 Port F5 Pin Mux Controls PTF5 01 LCD41 10 Reserved 11 AD17 1–0 Port F4 Pin Mux Controls PTF4 01 Reserved 10 LCD40 11 AD16 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 4-32. PTFPF1 Field Descriptions Description Freescale Semiconductor 0 0 ...
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... PTF2 01 LCD38 10 Reserved 11 RX3 3–2 Port F1 Pin Mux Controls PTF1 01 LCD37 10 Reserved 11 EXTRIG 1–0 Port F0 Pin Mux Controls PTF0 01 LCD36 10 Reserved 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-33. PTFPF2 Field Descriptions Description Parallel Input/Output Control ...
Page 138
... LCD7 Pin Mux Controls. LCD7 00 LCD7 01 MISO2 10 Reserved 11 Reserved 1–0 LCD6 Pin Mux Controls. LCD6 00 LCD6 01 MOSI2 10 Reserved 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev LCD8 Table 4-34. LCDPF1 Field Descriptions Description 2 1 LCD7 LCD6 0 0 Freescale Semiconductor 0 0 ...
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... W Reset 0 0 Figure 4-29. LCD Pin Function Register 2 (LCDPF2) Field 1–0 Port LCD35 Pin Mux Controls. LCD35 00 LCD35 01 CLKOUT 10 Reserved 11 Reserved MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 4-35. LCDPF2 Field Descriptions Description Parallel Input/Output Control ...
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... Parallel Input/Output Control MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 4-30 Freescale Semiconductor ...
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... Every GPIO port, including the RGPIO module, has registers that configure, monitor, and control the port pins. Figure 5-1 shows the MCF51EM256/128 block diagram with the RGPIO highlighted. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor 5-1 ...
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... PTF3/LCD39/TX3 PTF2/LCD38/RX3 Clock Check PTF1/LCD37/EXTRIG & Select PTF0/LCD36 Port C: XOSC2 DADP/M[3,0] EXTAL2 AD[7,4] XTAL2 Port A0 or LCD25 DADP/M[2:1] CLKO AD[6:5] XOSC1 EXTAL1 XTAL1 Port A0 or LCD25 CLKO Independent The IRTC separate RTC power domain the LCD controller. V TAMPER BAT Freescale Semiconductor ...
Page 143
... Package pin toggle rates typically 1.5–3.5x faster than comparable pin mapped onto peripheral bus A simplified block diagram of the RGPIO module is shown in and pad logic are device-specific. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Rapid GPIO (RGPIO) Figure 5-2. The details of the pin muxing ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Direction mux 16 31 rgpio_direction rgpio_data_out Pin Muxing + Pad Logic RGPIO[15:0] Figure 5-2. RGPIO Block Diagram data to module address decode Control Write D ata 0 Read D ata 15 rgpio_data_in 0 31 data from module Local Bus Freescale Semiconductor ...
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... I/O Data Input/Output. When configured as an input, the state of this signal is reflected in the read data register. When configured as an output, this signal is the output of the write data register. State Meaning Timing MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Type Description I/O RGPIO Data Input/Output Description Asserted— ...
Page 146
... Width Register (bits Access Reset Value Section/Page W 0x0000 5.3.1/5-6 W 0x0000 5.3.2/5-7 W 0x0000 5.3.3/5-8 W N/A 5.3.4/5-8 W N/A 5.3.5/5-9 W N/A 5.3.6/5-9 Access Reset Value Section/Page R 0x0000 5.3.1/5-6 R 0x0000 5.3.2/5-7 R 0x0000 5.3.3/5-8 R 0x0000 5.3.2/5-7 R 0x0000 5.3.1/5-6 R 0x0000 5.3.2/5-7 R 0x0000 5.3.1/5-6 R 0x0000 5.3.2/5-7 Freescale Semiconductor ...
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... RGPIO_DATA register. Offset: RGPIO_Base + 0x2 (RGPIO_DATA) RGPIO_Base + 0x6 RGPIO_Base + 0xA RGPIO_Base + 0xE Reset Figure 5-4. RGPIO Data Register (RGPIO_DATA) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor DIR Table 5-5. RGPIO_DIR Field Descriptions Description ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 5-8 Table 5-6. RGPIO_DATA Field Descriptions Description ENB Table 5-7. RGPIO_ENB Field Descriptions Description CLR — — — — — Access: Read/write Access: Write-only — — — — — — Freescale Semiconductor — ...
Page 149
... Offset: RGPIO_Base + 0xE (RGPIO_TOG Reset — — — — Figure 5-8. RGPIO Toggle Data Register (RGPIO_TOG) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 5-8. RGPIO_CLR Field Descriptions Description SET — — — — — Table 5-9. RGPIO_SET Field Descriptions ...
Page 150
... BCHG_LOOP — In this loop, a bit change instruction was executed using the GPIO data byte as the operand. This instruction performs a read-modify-write operation and inverts the addressed bit. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 5-10 Table 5-10. RGPIO_TOG Field Descriptions Description Freescale Semiconductor ...
Page 151
... SPI interface using a RGPIO # the SPI protocol uses a 3-bit value: clock, chip-select, data # the data is centered around the rising-edge of the clock send_16b_spi_message_rgpio: MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Frequency @ Relative Sq-Wave CPU MHz ...
Page 152
... RGPIO Relative Speed 1.29x Freescale Semiconductor ...
Page 153
... On the MCF51EM256 series, wait, stop2, stop3, and stop4 are all entered via the CPU STOP instruction. See Table 6-1, Figure 6-2, and subsequent sections of this chapter for details. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Section 1.3.5, “ICS 6-1 ...
Page 154
... After entering a low-power mode not possible to switch to another low-power mode. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 6-2 SPMSC2[PPDC] In Stop Mode LVD Off Standby Enable SPMSC2[LPR] Figure 6-1. This figure is for Partial Power Down Standby Freescale Semiconductor ...
Page 155
... Assuming that neither low voltage interrupts nor BDM are enabled, stop3 can be entered from run simply by executing a STOP command. It can also be entered from LPrun via stop. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 6-1. CPU / Power Mode Selections SOPT1 ...
Page 156
... LPrun LPwait for a description of the various ways to enter halt mode. Mode Regulator State Run Full On Wait Full On Stop4 Full On LPrun Standby LPwait Standby Stop3 Standby Stop2 Partial Power Off Figure 6-2 and adds the BDM halt mode 1 Freescale Semiconductor Table 6-1. ...
Page 157
... Run 2 Stop2 LPrun 3 LPwait LPrun 4 Stop3 LPwait 5 Run Run 6 Wait Run 7 Stop4 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Stop4 Stop3 Run Stop2 Wait LPwait Figure Table 6-2. Triggers for State Transition To Configure settings shown in LPrun LPR = 1 last ...
Page 158
... MCU is operated in run mode for the first time. When the MCF51EM256 series are shipped from the Freescale Semiconductor factory, the flash program memory is erased by default unless specifically noted, so there is no program that could be executed in run mode until the flash memory is initially programmed ...
Page 159
... LPRS bit in SPMSC2, and returns the device to normal run mode. The LPR bit remains set and 1. System clock gating control registers & FLL bypassed external low-power MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor 1 . Section 11.4.1, “Operational Modes,” ...
Page 160
... Again, note that BKGD/MS is multiplexed with PTC2. The pin must be configured as BKGD/MS for this operation to occur. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 6-8 6-1. In the low-power wait mode, the on-chip voltage regulator remains in Table 6-1. Upon Freescale Semiconductor ...
Page 161
... IRTC, LCD, and debug trace buffer. Refer to the individual module chapters for more information on which other registers are unaffected by wake-up from stop2 mode. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Chapter 11, “Internal Clock Source NOTE shows all of the control bits that affect mode selection under ...
Page 162
... If stop3 is exited by the RESET pin, the MCU is reset and operation resumes after taking the reset vector. Exit by one of the internal interrupt sources results in the MCU taking the appropriate interrupt vector. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 6-10 is below the LVD DD Table 6-1. The Freescale Semiconductor ...
Page 163
... Off 1 Subject to module enables and settings of System Clock Gating Control Registers (SCGC1– SCGC5). MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor If XCSR[ENBDM] is set when the CPU for specific information on system behavior in stop modes. Table 6-4 to describe operation of components on the chip in the various Table 6-3 ...
Page 164
... HGO = 0 HGO = 0 SoftNoClk FullNoClk SoftOn SoftOn FullOn SoftOn BLPE Any mode BLPE SoftOn FullOn SoftOn SoftOn FullOn SoftOn FullOn FullOn FullOn SoftOn FullOn SoftOn On On Disabled FullOn Disabled SoftOn FullOn SoftOn SoftOn FullOn SoftOn SoftOn FullOn SoftOn On On Freescale Semiconductor On On ...
Page 165
... PMC to wakeup result, the device undergoes a power-on-reset sequence. 6 The LCD can continue to drive a DISPLAY so long as one of the OSCOUT1 or OSCOUT2 signals into the LCD module is enabled for operation in Stop modes. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Mode Stop3 Stop4 LPwait ...
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... Modes of Operation MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 6-14 Freescale Semiconductor ...
Page 167
... Low-voltage detect (LVD) • Background debug forced reset Each of these sources, with the exception of the background debug forced reset, has an associated bit in the system reset status register (SRS). MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 7-1) 7-1 ...
Page 168
... This will prevent accidental changes if the application program gets lost. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-2 NOTE and must not be driven DD NOTE Section 7.7.6, “System Options 1 (SOPT1) Register,” Table 7-10 summarizes the control functions of the . DD Freescale Semiconductor ...
Page 169
... Level 7 interrupts are treated as non-maskable and edge-sensitive within the processor, while levels 1-6 are treated as level-sensitive and may be masked depending on the value of the SR[I] field. For correct MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Resets, Interrupts, and General System Control 7-3 ...
Page 170
... External interrupts are managed by the IRQ status and control register, IRQSC. When the IRQ function is enabled, synchronous logic monitors the pin for edge-only or edge-and-level events. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-4 Chapter 10, “Interrupt Controller Table 7-1 (CF1_INTC).” Freescale Semiconductor ...
Page 171
... Table 7-1 shows address assignments for reset and interrupt vectors. The vector names shown in this table are the labels used in the Freescale Semiconductor-provided equate file for the MCF51EM256 series microcontrollers. The table is sorted by priority of the sources, with higher-priority sources at the top of the table ...
Page 172
... Receive Buffer Full Interrupt SPI1_S[SPTEF] Transmit Buffer Empty Interrrupt SPI1_S[SPMF] Receive Data Match Interrupt SPI1_S[RNEARFF] Receive FIFO Nearly Full Interrupt SPI1_S[TNEAREF] Transmit FIFO Nearly Empty Interrupt SPI2_S[MODF] Mode Fault Interrupt SPI2_S[SPRF] Receive Buffer Full Interrupt SPI2_S[SPTEF] Transmit Buffer Empty Interrrupt Description Freescale Semiconductor ...
Page 173
... PDBSC[IE] PDB_ERR N/A Interrupt FTSR_Local Enable FTSR_emptybuf FTSR_FCNFG[CBEIE] FTSR_coco FTSR_FCNFG[CCIE] MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Source SPI3_S[MODF] Mode Fault Interrupt SPI3_S[SPRF] Receive Buffer Full Interrupt SPI3_S[SPTEF] Transmit Buffer Empty Interrrupt IIC_SR[IICIF] Complete 1-byte tranfer (TCF) Interrupt ...
Page 174
... CPUCR[30] CPUCR[30] N/A CPUCR[30] CPUCR[30] Chapter 10, “Interrupt Controller Table Reported using SRS — — — — — — — — — — — — — — — — — — — ilad — ilop ilop — ilop 1 ilop Freescale Semiconductor 7-3. ...
Page 175
... LVD voltage. The LVW also has an interrupt associated with it, enabled by setting the SPMSC3[LVWIE] bit. If enabled, an LVW interrupt request will occur when the LVWF is set. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Resets, Interrupts, and General System Control Reset Disabled via CPUCR ...
Page 176
... Chapter 6, “Modes of Operation.” MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-10 ) and one low (V ). The trip voltage is selected by SPMSC3[LVWV] LVWL NOTE Assignments,” for the absolute address Freescale Semiconductor ...
Page 177
... Section 7.4.1.2, “Edge and Level 0 IRQ event on falling edges or rising edges only. 1 IRQ event on falling edges and low levels or on rising edges and high levels Port Mux Control MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor IRQF IRQEDG IRQPE ...
Page 178
... Bandgap buffer disabled. 1 Bandgap buffer enabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev LVDIE LVDRE LVDSE 0 1 transitions below the trip point or after reset and V Supply Table 7-5. SPMSC1 Field Descriptions Description LVDE BGBDS already below V Supply Freescale Semiconductor 0 BGBE 0 . LVD ...
Page 179
... Partial Power-Down Flag — This read-only status bit indicates that the microcontroller has recovered from stop2 PPDF mode. 0 Microcontroller has not recovered from stop2 mode. 1 Microcontroller recovered from stop2 mode. 2 Partial Power-Down Acknowledge — Writing PPDACK clears the PPDF bit. PPDACK MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor PPDF LPWUI 0 0 — ...
Page 180
... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-14 Table 7-6. SPMSC2 Bit Field Descriptions Description LVDV LVWV LVWIE Table 7-7. SPMSC3 Bit Field Descriptions Description = V ). LVD LVDL = V ). LVD LVDH = V ). LVW LVWL = V ). LVW LVWH already below V . Supply LVW ). LVD ). LVW Freescale Semiconductor ...
Page 181
... Any of these reset sources that are active at the time of reset entry will cause the corresponding bit( set; bits corresponding to sources that are not active at the time of reset entry will be cleared. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 7-7. SPMSC3 Bit Field Descriptions Description ...
Page 182
... SOPT1 must be written to during the reset initialization program to set the desired controls, even if the desired settings are the same as the reset settings. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-16 Table 7-9. SRS Bit Field Descriptions Description Freescale Semiconductor ...
Page 183
... Normal mode 1 Window mode Control Bits SOPT1[COPCLKS] SOPT1[COPT] N MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor STOPE WAITE Table 7-10. SOPT1 Bit Field Descriptions Description Table 7-11. COP Configuration Details COP Window Clock Source N/A 1 kHz 1 kHz 1 kHz Bus ...
Page 184
... Figure 7-8. System Device Identification Register — High (SDIDH) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev ms. LPO — — Table 7-12. SOPT2 Bit Field Descriptions Description ID11 — — PMC_LVD_TRIM — — — Section 8.3.3.14, “Reset 2 1 ID10 ID9 ID8 1 0 Freescale Semiconductor ...
Page 185
... ADC 3 Clock Gate Control — This bit controls the clock gate to the ADC 3 module. ADC3 0 Bus clock to the ADC 3 module is disabled. 1 Bus clock to the ADC 3 module is enabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 7-13. SDIDH Bit Field Descriptions Description 5 4 ...
Page 186
... Bus clock to the PRACMP1 module isenabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-20 Table 7-15. SCGC1 Bit Field Descriptions Description for more information VREF IRQ LCD Table 7-16. SCGC2 Bit Field Descriptions Description SPI3 SPI2 SPI1 — Freescale Semiconductor ...
Page 187
... PTF Clock Gate Control — This bit controls the clock gate to the PTF module. PTF 0 Bus clock to the PTF module is disabled. 1 Bus clock to the PTF module is enabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 7-16. SCGC2 Bit Field Descriptions Description for more information. 5 ...
Page 188
... Bus clock to the TPM module is enabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-22 Table 7-17. SCGC3 Bit Field Descriptions Description CRC TPM PDB Table 7-18. SCGC4 Bit Field Descriptions Description for more information MTIM3 MTIM2 MTIM1 1 1 Freescale Semiconductor 0 1 ...
Page 189
... Only the clock to the flash control registers is affected. 0 Bus clock to flash registers is disabled. 1 Bus clock to flash registers is enabled. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 7-18. SCGC4 Bit Field Descriptions ...
Page 190
... The various clock sources must be enabled/disabled via the appropriate controls elsewhere in the device TPM W POR Figure 7-16. SIM Internal Peripheral Select Register 1 (SIMIPS1) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev Table 7-20. SIMCO Bit Field Descriptions Description MTIM3 MTIM2 MTIM1 Freescale Semiconductor ...
Page 191
... RX1 is fed from the digital input pin (assuming the RX1 is enabled on that pin via the MC registers RX1 is fed from the output of comparator 1 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Table 7-21. SIMIPS1 Bit Field Descriptions Description Figure 2-4 ...
Page 192
... Modulate the output of SCI2 with the timebase selected via the MTBASE2 field 0 Modulate TX1 — MODTX1 not modulate the output of SCI1 1 = Modulate the output of SCI1 with the timebase selected via the MTBASE1 field MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 7-26 Table 7-22. SIMIPS2 Register Bit Fields Freescale Semiconductor ...
Page 193
... AGEX The instruction fetch pipeline (IFP two-stage pipeline for prefetching instructions. The prefetched instruction stream is then gated into the two-stage operand execution pipeline (OEP), that decodes the MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Instruction Address Generation Instruction ...
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... MAC registers (described fully in — One 32-bit accumulator(ACC) register — One 16-bit mask register (MASK) — 8-bit Status register (MACSR) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 8-2 Table 8-1 lists the processor registers. Chapter 9, “Multiply-Accumulate Unit (MAC)”) Freescale Semiconductor ...
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... Supervisor A7 Stack Pointer Store: 0xC0 (OTHER_A7) Load: 0xE1 Vector Base Register (VBR) Store: 0xC1 Load: 0xE2 CPU Configuration Register (CPUCR) Store: 0xC2 MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor Width Access (bits) Supervisor/User Access Registers 32 R/W 32 R/W 32 R/W ...
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... Section 8.3.3.14, “Reset Exception” Figure 8-2. Data Registers (D0–D7) Address Figure 8-3. Address Registers (A0–A6) Written with Reset Value 2 MOVEC R/W 0x27-- No (These BDM commands are not Access: User read/write BDM read/write Access: User read/write BDM read/write Freescale Semiconductor Section/Page 8.2.8/8 ...
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... The extend bit (X) is also an input operand during multiprecision arithmetic computations. The CCR register must be explicitly loaded after reset and before any compare (CMP), Bcc, or Scc instructions are executed. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor NOTE instruction before any move.l Ay,USP ...
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... MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev — — Figure 8-5. Condition Code Register (CCR) Table 8-2. CCR Field Descriptions Description Figure 8-6. Program Counter Register (PC) Access: User read/write BDM read/write — — Access: User read/write BDM read/write Address Freescale Semiconductor 0 C — ...
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... Figure 8-8. CPU Configuration Register (CPUCR) MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 Freescale Semiconductor – – – – – – – – – – – – – – – – – – – – Base Address Figure 8-7. Vector Base Register (VBR) ...
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... All defined bits in the SR have read/write access when in supervisor mode. The lower byte of the SR (the CCR) must be loaded explicitly after reset and before any compare (CMP), Bcc, or Scc instructions execute. MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8 8-8 Table 8-3. CPUCR Field Descriptions Description Freescale Semiconductor ...