MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 175

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.5
The MCF51EM256 series microcontrollers include a system to protect against low voltage conditions to
protect memory contents and control microcontroller system states during supply voltage variations. The
system is comprised of a power-on reset (POR) circuit and a LVD circuit with a user-selectable trip
voltage, either high (V
is set and the trip voltage is selected by the SPMSC3[LVDV] bit. The LVD is disabled upon entering stop2
or stop3 modes unless the LVDSE bit is set. If both LVDE and LVDSE are set when the STOP instruction
is processed, the device will enter STOP4 mode. The LVD can be left enabled in this mode.
7.5.1
When power is initially applied to the microcontroller, or when the supply voltage drops below the
power-on reset re-arm voltage level, V
voltage rises, the LVD circuit will hold the microcontroller in reset until the supply has risen above the
LVD low threshold, V
7.5.2
The LVD can be configured to generate a reset upon detection of a low voltage condition by setting
LVDRE to 1. The low voltage detection threshold is determined by the LVDV bit. After an LVD reset has
occurred, the LVD system will hold the microcontroller in reset until the supply voltage has risen above
the low voltage detection threshold. The LVD bit in the SRS register is set following either an LVD reset
or POR.
7.5.3
When a low voltage condition is detected and the LVD circuit is configured using SPMSC1 for interrupt
operation (LVDE set, LVDIE set, and LVDRE clear), then LVDF in SPMSC1 will be set and an LVD
interrupt request will occur. The LVDF bit is cleared by writing a 1 to the LVDACK bit in SPMSC1.
7.5.4
The LVD system has a low voltage warning flag (LVWF) to indicate to the user that the supply voltage is
approaching, but is above, the LVD voltage. The LVW also has an interrupt associated with it, enabled by
setting the SPMSC3[LVWIE] bit. If enabled, an LVW interrupt request will occur when the LVWF is set.
Freescale Semiconductor
Low-Voltage Detect (LVD) System
1
Vector
Power-On Reset Operation
LVD Reset Operation
LVD Interrupt Operation
Low-Voltage Warning (LVW) Interrupt Operation
The execution of the ILLEGAL instruction (0x4AFC) always generates an illegal instruction
exception, regardless of the state of CPUCR[30].
n/a
3
2
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
LVDL
LVDH
Address error
Flt-on-Flt Halt
Access error
Table 7-3. Exception Types to System Reset (continued)
Exception
. Both the POR bit and the LVD bit in SRS are set following a POR.
) or low (V
POR
LVDL
Reset Disabled via CPUCR
, the POR circuit will cause a reset condition. As the supply
). The LVD circuit is enabled when the SPMSC1[LVDE] bit
CPUCR[31]
CPUCR[31]
CPUCR[31]
Resets, Interrupts, and General System Control
Reported using SRS
ilad
ilad
ilad
7-9