MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 391

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

All registers except the write enable bits in the Control Register are protected from spurious updated by
any run-away code. The above registers will be accessible in the module based on the feature selection set
by system integrator. The register map does not change but registers pertaining to unselected features will
be considered as reserved. Writes will have no effect and reads will return zeros.
Write access to reserved locations & to registers during write protect enable mode will generate transfer
error and read access to reserved locations will generate transfer error and the read data bus will show all
1s.
Below is a detailed description of all the above registers. Each register has been explained using a register
diagram showing the bits and their reset value with access type. This is followed by a detailed description
of each bit/bit-field along with valid values for each field. Where ever applicable, fields have been shown
in both binary and BCD.
17.5.1
Freescale Semiconductor
0x40 to 0x5F
Reset Value
Reset Value
Address
IRTC_YEARMON
Field (bcd)
Field (bcd)
Field (bin)
Field (bin)
0x3E
Bit Type
Bit Type
IRTC Year & Month Counters Register (IRTC_YEARMON)
IRTC does not check for the correctness of values programmed into its
registers; hence programming illogical time & date entries will result in an
undefined operation. Normal functionality is not guaranteed in that case.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Bit 15
rsvd
Bit 7
rw
—
Figure 17-2. IRTC Year & Month Counters Register (IRTC_YEARMON)
0
Bit 14
rsvd
Bit 6
rw
—
MONTH (tens)
0
Value remains in binary as year indicates offset from base year
Register Name
Standby RAM.
Table 17-1. Register Map (continued)
RESERVED
Bit 13
rsvd
Bit 5
rw
—
0
Year & Month Counters Register
Bit 12
rsvd
Bit 4
NOTE
rw
—
0
YEAR
Bit 11
Bit 3
rw
rw
0
0
read/write
Access
Bit 10
Bit 2
MONTH (units)
rw
rw
Independent Robust Real Time Clock (IRTC)
0
0
n/a
MONTH
Bit 9
Bit 1
rw
rw
0
0
Write Protect
all bits
n/a
Bit 8
Bit 0
Offset: 0x00
rw
rw
0
1
0x00
0x01
17-7