MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 191

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.7.16
The fields in this register control sources used for two of the SCI RX pins, as well as modulation choices
for the SCI TX pins. The various clock sources used for modulation purposes must be enabled/disabled
via the appropriate controls elsewhere in the device. See
action.
Freescale Semiconductor
POR:
MTIM3
MTIM2
MTIM1
RX2IN
RX1IN
Field
Field
TPM
5-4
2-1
7
6
3
0
7
6
W
R
RX2IN
Internal Peripheral Select Register 2 (SIMIPS2)
TPM External Clock Select Pin —
0 = The external clock input of TPM will be fed by TPMCLK
1 = The external clock input of TPM will be fed by the output of MTIM1
Reserved — Write as zero.
MTIM3 External Clock Pin Select —
00 = The TCLK input of MTIM3 will be fed by TMRCLK1
01 = The TCLK input of MTIM3 will be fed by TMRCLK2
10 = The TCLK input of MTIM3 will be fed by the output of MTIM1
11 = RESERVED
Reserved — Write as zero.
MTIM2 External Clock Pin Select —
00 = The TCLK input of MTIM2 will be fed by TMRCLK1
01 = The TCLK input of MTIM2 will be fed by TMRCLK2
10 = The TCLK input of MTIM2 will be fed by the output of MTIM1
11 = RESERVED
MTIM1 External Clock Pin Select —
0 = The TCLK input of MTIM1 will be fed by TMRCLK1
1 =The TCLK input of MTIM1 will be fed by TMRCLK2
SCI2 RX Input Pin Select —
0 = RX2 is fed from the digital input pin (assuming the RX2 is enabled on that pin via the MC registers)
1 = RX2 is fed from the output of comparator 2
SCI1 RX Input Pin Select —
0 = RX1 is fed from the digital input pin (assuming the RX1 is enabled on that pin via the MC registers)
1 = RX1 is fed from the output of comparator 1
0
7
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure 7-17. SIM Internal Peripheral Select Register 1 (SIMIPS2)
RX1IN
0
6
Table 7-21. SIMIPS1 Bit Field Descriptions
Table 7-22. SIMIPS2 Register Bit Fields
0
5
MTBASE2
0
4
Description
Description
Figure 2-4
3
0
MTBASE1
Resets, Interrupts, and General System Control
for an illustration of these controls in
0
2
MODTX2
0
1
MODTX1
0
0
7-25