MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 558

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Programmable Reference Analog Comparator (PRACMP)
25.3
Table 25-2
Refer to the direct-page register summary in the memory chapter of this reference manual for the absolute
address assignments for all PRACMP registers.
25.3.1
25-4
Reset
ACMPO
ACMPF
ACOPE
ACEN
Field
7
6
4
3
W
R
Memory Map and Register Definition
is the memory map of the programmable reference analog comparator (PRACMP).
ACEN
Base + $0
Base + $1
Base + $2
Base + $3
PRACMP Control and Status Register (PRACMPxCS)
Address
ACMP enable control bit
ACMP Interrupt Flag Bit — Synchronously set by hardware when ACMP output has a valid edge defined by
ACINTS[1:0]. The setting of this bit lags the ACMPO 2 bus clocks. Clear ACMPF bit by writing a 0 to this bit.
Writing a 1 to this bit has not effect.
Analog Comparator Output Pin Enable — ACOPE enables the comparator output to be placed onto the
external pin, ACMPxO.
0 Analog comparator output is not available on ACMPx1O.
1 Analog comparator output is driven out on ACMPx1O.
ACMP Output Bit — ACMP output is synchronized by bus clock to form this bit. It changes following the ACMP
output. This bit is a read only bit.
7
0
0 The ACMP is disabled
1 The ACMP is enabled
Set when the output of the ACMP is high
Cleared when the output of the ACMP is low
After any reset or when the ACMP is disabled, this bit is read as 0.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure 25-2. PRACMPx Control and Status Register (PRACMPxCS)
ACMPF
PRACMP Control and Status Register (PRACMPxCS)
6
0
Unimplemented or Reserved
PRACMP Control Register 0 (PRACMPxC0)
PRACMP Control Register 1 (PRACMPxC1)
PRACMP Control Register 2 (PRACMPxC2)
Table 25-3. PRACMPxCS Descriptions
Table 25-2. Module Memory Map
5
0
Use
ACOPE
4
0
Description
ACMPO
3
0
2
0
ACINTS
Read/Write
Read/Write
Read/Write
Read/Write
Access
Freescale Semiconductor
1
0
ACIEN
0
0