MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 393

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.5.2
This read/write register contains the current value of the day-of-week counter and day counter. This
register can be read at any time without affecting the counter count values. Writing to this register loads
the value to the day-of-week and day counter and the counters continue to count from this new value. This
register unaffected on software reset.
In the BCD mode, the days counter value gets converted in BCD format as shown in table, while the
day-of-week counter remains unchanged as the value is same in binary and in BCD format. This is
controlled by the bit in IRTC_CTRL register.
MCU should first read the INVAL bit of the IRTC_STATUS (bit 0) to determine that the counters are stable
and they can be changed. The INVAL bit ensures that no operation is done at the boundary of a second
when counters change value. MCU should check the status of this bit both during reads and writes.
Freescale Semiconductor
DAY_OF_WEE
Reset Value
Reset Value
Field (bcd)
Field (bcd)
Field (bin)
Field (bin)
15–11
DAYS
Field
10–8
IRTC_DAYS
7–5
4–0
Bit Type
Bit Type
K
IRTC Day & Day-of-Week Counters Register (IRTC_DAYS)
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Reserved bits. Read returns zeros.
Day of the Week Count.
‘0’ – Sunday
‘1’ – Monday
‘2’ – Tuesday
‘3’ – Wednesday
Reserved bits in Binary mode. Read returns zeros. In BCD mode, these are used.
Days counter value. Valid Count: 1 – 31
Bit 15
rsvd
rsvd
Figure 17-3. IRTC Day & Day-of-Week Counters Register (IRTC_DAYS)
Bit 7
—
—
Bit 14
rsvd
rsvd
Bit 6
—
—
DAYS (tens)
Table 17-3. IRTC_DAYS Field Descriptions
Bit 13
rsvd
rsvd
Bit 5
Days & Day-of-Week Counters Register
—
—
‘5’ – Friday
‘4’ – Thursday
‘6’ – Saturday
‘7’ – Reserved. Should not be used
Bit 12
rsvd
Bit 4
—
rw
0
Description
Bit 11
rsvd
Bit 3
—
rw
0
DAYS
Bit 10
Bit 2
rw
rw
Independent Robust Real Time Clock (IRTC)
Value remains unchanged
0
0
DAYS (units)
DAY_OF_WEEK
Bit 9
Bit 1
rw
rw
0
0
Bit 8
Bit 0
Offset: 0x02
rw
rw
0
1
0x02
0x03
17-9