MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 198

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
ColdFire Core
8.2.5
The PC contains the currently executing instruction address. During instruction execution and exception
processing, the processor automatically increments PC contents or places a new value in the PC. The PC
is a base address for PC-relative operand addressing.
The PC is initially loaded during reset exception processing with the contents at location 0x(00)00_0004.
8-6
Field
7–5
X
N
Z
V
C
4
3
2
1
0
Reset:
BDM: LSB of Status Register (SR)
W
R
Reset 0 0 0 0 0 0 0 0 – – – – – – – – – – – – – – – – – – – – – – – –
BDM: Load: 0xEF (PC)
Reserved, must be cleared.
Extend condition code bit. Set to the C-bit value for arithmetic operations; otherwise not affected or set to a specified
result.
Negative condition code bit. Set if most significant bit of the result is set; otherwise cleared.
Zero condition code bit. Set if result equals zero; otherwise cleared.
Overflow condition code bit. Set if an arithmetic overflow occurs implying the result cannot be represented in operand
size; otherwise cleared.
Carry condition code bit. Set if a carry out of the operand msb occurs for an addition or if a borrow occurs in a
subtraction; otherwise cleared.
Load: 0xEE (SR)
Store: 0xCE (SR)
W
R 0 0 0 0 0 0 0 0
Program Counter (PC)
Store: 0xCF (PC)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
7
0
0
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
0
0
6
Figure 8-5. Condition Code Register (CCR)
Figure 8-6. Program Counter Register (PC)
Table 8-2. CCR Field Descriptions
0
0
5
X
4
Description
N
3
Address
Z
2
8
7
Access: User read/write
6
Freescale Semiconductor
Access: User read/write
5
V
1
BDM read/write
4
3
BDM read/write
2
1
C
0
0

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