MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 264

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Internal Clock Source (ICS)
11.3.2
11.3.3
11-10
EREFSTEN
ERCLKEN
RANGE
EREFS
Field
BDIV
HGO
7:6
LP
5
4
3
2
1
0
Reset:
Reset: Note: TRIM is loaded during reset from a factory programmed location when not in BDM mode. If in a BDM
W
R
W
R
ICS Control Register 2 (ICSC2)
ICS Trim Register (ICSTRM)
Bus Frequency Divider — Selects the amount to divide down the clock source selected by the CLKS bits. This
controls the bus frequency.
00
01
10
11
Frequency Range Select — Selects the frequency range for the external oscillator.
1 High frequency range selected for the external oscillator.
0 Low frequency range selected for the external oscillator.
High Gain Oscillator Select — The HGO bit controls the external oscillator mode of operation.
1 Configure external oscillator for high gain operation.
0 Configure external oscillator for low power operation.
Low Power Select — The LP bit controls whether the FLL is disabled in FLL bypassed modes.
1 FLL is disabled in bypass modes unless BDM is active.
0 FLL is not disabled in bypass mode.
External Reference Select — The EREFS bit selects the source for the external reference clock.
1 Oscillator requested.
0 External Clock Source requested.
External Reference Enable — The ERCLKEN bit enables the external reference clock for use as ICSERCLK.
1 ICSERCLK active.
0 ICSERCLK inactive.
External Reference Stop Enable — The EREFSTEN bit controls whether or not the external reference clock
source (OSCOUT) remains enabled when the ICS enters stop mode.
1 External reference clock source stays enabled in stop if ERCLKEN is set before entering stop.
0 External reference clock source is disabled in stop.
mode, a default value of 0x80 is loaded.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 1.11
Encoding 0 — Divides selected clock by 1.
Encoding 1 — Divides selected clock by 2 (reset default).
Encoding 2 — Divides selected clock by 4.
Encoding 3 — Divides selected clock by 8.
0
7
7
BDIV
Table 11-9. ICS Control Register 2 Field Descriptions
1
6
6
Figure 11-8. ICS Control Register 2 (ICSC2)
Figure 11-9. ICS Trim Register (ICSTRM)
RANGE
5
0
5
HGO
0
4
4
Description
TRIM
LP
3
0
3
EREFS
0
2
2
ERCLKEN EREFSTEN
Freescale Semiconductor
1
0
1
0
0
0

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