MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 451

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.3.2.2
20.3.2.3
20.4
To enable the CRC function, a write to the CRCH register will trigger the first half of the seed mechanism
which will place the CRCH value directly into bits 15-8 of the CRC generator shift register. The CRC
generator will then expect a write to CRCL to complete the seed mechanism.
As soon as the CRCL register is written to, its value will be loaded directly into bits 7-0 of the shift register,
and the second half of the seed mechanism will be complete. This value in CRCH:CRCL will be the initial
seed value in the CRC generator.
Freescale Semiconductor
TRANSP
CRCL
Field
Field
OSE
Reset
Reset
7:0
7:0
W
W
R
R
CRCL — This is the low byte of the 16-bit CRC register. Normally, a write to CRCL will cause
the CRC generator to begin clocking through the 16-bit CRC generator. As a special case, if a
write to CRCH has occurred previously, a subsequent write to CRCL will load the value in the
register as the low byte of a 16-bit seed value directly into bits 7-0 of the shift register in the
CRC generator. A read of CRCL will read bits 7-0 of the current CRC calculation result directly
out of the shift register in the CRC generator.
TRANSPOSE — This register is used to transpose data, converting from LSb to MSb (or
vice-versa). The byte to be transposed should be first written to TRANSPOSE and then
subsequent reads from TRANSPOSE will return the transposed value of the last written byte (bit
7 becomes bit 0, bit 6 becomes bit 1, and so forth).
Functional Description
Bit 7
Bit 7
CRC Low Register (CRCL)
0
Transpose Register (TRANSPOSE)
0
7
7
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Bit 6
Bit 6
0
0
6
6
Figure 20-4. Transpose Register (CRCH)
Figure 20-3. CRC High Register (CRCH)
Table 20-3. Register Field Descriptions
Table 20-4. Register Field Descriptions
Bit 5
Bit 5
0
0
5
5
Bit 4
Bit 4
0
0
4
4
Description
Description
Bit 3
Bit 3
3
0
3
0
Bit 2
Bit 2
2
0
2
0
Cyclic Redundancy Check (CRC)
Bit 1
Bit 1
0
0
1
1
Bit 0
Bit 0
0
0
0
0
20-5