MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 180

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
Resets, Interrupts, and General System Control
1
7.7.4
This register reports the status of the low voltage warning function and is used to select the low voltage
detect trip voltage. SPMSC3 is not reset when exiting from stop2.
7-14
See data sheet for minimum and maximum values.
LVWF is set when V
LVWACK
reset:
POR:
other
PPDC
PPDE
LVWF
LVWV
LVR:
Field
Field
LVDV
Any
1
0
7
6
5
4
W
R
LVWF
System Power Management Status and Control 3 Register
(SPMSC3)
Partial Power-Down Enable. The write-once PPDE bit can be used to lockout the partial power-down feature. This
is a write-once bit.
0 Partial power-down is not enabled.
1 Partial power-down is enabled and controlled via the PPDC bit.
Partial Power-Down Control — The PPDC bit controls which power-down mode is selected. This bit cannot be
set if LPR = 1. If PPDC and LPR are set in a single write instruction, only PPDC will actually be set. PPDE must
be set in order for PPDC to be set.
0 Stop3 low power mode enabled.
1 Stop2 partial power-down mode enabled.
Low-Voltage Warning Flag. The LVWF bit indicates the low voltage warning status.
0 Low voltage warning not present.
1 Low voltage warning is present or was present.
Low-Voltage Warning Acknowledge. Writing a 1 to LVWACK clears LVWF if a low voltage warning is not present.
Low-Voltage Detect Voltage Select. The LVDV bit selects the LVD trip point voltage (V
0 Low trip point selected (V
1 High trip point selected (V
Low-Voltage Warning Voltage Select. The LVWV bit selects the LVW trip point voltage (V
0 Low trip point selected (V
1 High trip point selected (V
Figure 7-4. System Power Management Status and Control 3 Register (SPMSC3)
0
0
0
7
1
1
1
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Supply
LVWACK
transitions below the trip point or after reset and V
0
0
0
0
6
Table 7-6. SPMSC2 Bit Field Descriptions
Table 7-7. SPMSC3 Bit Field Descriptions
LVD
LVW
LVDV
LVD
LVW
U
U
0
5
= V
= V
= V
= V
LVDL
LVWL
LVDH
LVWH
).
).
).
).
LVWV
U
U
0
4
Description
Description
LVWIE
3
0
0
0
Supply
is already below V
0
0
0
0
2
LVD
Freescale Semiconductor
LVW
LVW
).
0
0
0
0
1
.
).
0
0
0
0
0