MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 242

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Interrupt Controller (CF1_INTC)
10.1.2
The Version 1 ColdFire interrupt controller includes:
10-6
Enable
Wakeup
•
•
•
Memory-mapped off-platform slave module
— 64-byte space located at top end of memory: 0x(FF)FF_FFC0–0x(FF)FF_FFFF
— Programming model accessed via the peripheral bus
— Encoded interrupt level and vector sent directly to processor core
Support of 30 peripheral I/O interrupt requests plus seven software (one per level) interrupt
requests
Fixed association between interrupt request source and level plus priority
— 30 I/O requests assigned across seven available levels and nine priorities per level
Features
CF1_INTC
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Wakeup
mux
≥
>
Interrupt Source Number
Interrupt Level & Vector
to V1 ColdFire core
Figure 10-1. CF1_INTC Block Diagram
Prioritization
Vector Gen
and
≥
ipr
Vector Mux
IACK
INTC_WCR
Spurious Vector
Level n Vector
8
INTC_FRC
mux
data from module
8
data to module
decode
Freescale Semiconductor
address
Peripheral Bus