MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 171

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.4.1.1
The IRQ pin enable (IRQPE) control bit in IRQSC must be set in order for the IRQ pin to act as the
interrupt request (IRQ) input. As an IRQ input, the user can choose the polarity of edges or levels detected
(IRQEDG), whether the pin detects edges-only or edges and levels (IRQMOD), and whether an event
causes an interrupt or only sets the IRQF flag which can be polled by software (IRQIE).
The IRQ pin, when enabled, defaults to use an internal pull device (IRQPDD = 0), configured as a pullup
or pulldown depending on the polarity chosen. If the user desires to use an external pullup or pulldown,
the IRQPDD can be set to turn off the internal device.
7.4.1.2
The IRQMOD control bit re-configures the detection logic so it detects edge events and pin levels. In the
edge and level detection mode, the IRQF status flag becomes set when an edge is detected (when the IRQ
pin changes from the deasserted to the asserted level), but the flag is continuously set (and cannot be
cleared) as long as the IRQ pin remains at the asserted level.
7.4.2
Table 7-1
are the labels used in the Freescale Semiconductor-provided equate file for the MCF51EM256 series
microcontrollers. The table is sorted by priority of the sources, with higher-priority sources at the top of
the table.
Freescale Semiconductor
PMC_lvw
Interrupt
PMC_lvd
SCI1_err
KBI1_int
KBI2_int
SCI1_rx
IRQ_int
shows address assignments for reset and interrupt vectors. The vector names shown in this table
Interrupt Vectors, Sources, and Local Masks
Pin Configuration Options
Edge and Level Sensitivity
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
SCI1_BDH[RXEDGIE]
SCI1_BDH[LBKDIE]
IRQ_IRQSC[IRQIE]
Table 7-1. MCF51EM256 Series Exception and Interrupt Vector Table
SCI1_C3[ORIE]
KBI1_SC[KBIE]
KBI2_SC[KBIE]
SCI1_C3[NEIE]
SCI1_C3[FEIE]
SCI1_C3[PEIE]
SCI1_C2[ILIE]
SCI1_C2[RIE]
Local Enable
PMC_LVWIE
PMC_LVDIE
SCI1_S2[RXEDGIF]
IRQ_IRQSC[IRQF]
SCI1_S2[LBKDIF]
SCI1_S1[RDRF]
SCI1_S1[IDLE]
KBI1_SC[KBF]
KBI2_SC[KBF]
SCI1_S1[OR]
SCI1_S1[NF]
SCI1_S1[FE]
SCI1_S1[PF]
PMC_LVWF
PMC_LVDF
Source
Keyboard Interface
Keyboard Interface
External Pin Interrupt
Low Voltage Interupt (low voltage than the warning
interrupt)
Low Voltage Warning Interrupt. Asserted when the
regulator starts to drop out of regulation.
Reciever Interrupt
Idle Line Interrupt
LIN Break Detect Interrupt
RxD Input Active Edge Interrupt
Overrun Interrupt
Framing Error Interrupt
Noise Error Interrupt
Parity Error Interrupt
Resets, Interrupts, and General System Control
Description
7-5