MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 204

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ColdFire Core
All ColdFire processors inhibit interrupt sampling during the first instruction of all exception handlers.
This allows any handler to disable interrupts effectively, if necessary, by raising the interrupt mask level
contained in the status register. In addition, the ISA_C architecture includes an instruction (STLDSR) that
stores the current interrupt mask level and loads a value into the SR. This instruction is specifically
intended for use as the first instruction of an interrupt service routine that services multiple interrupt
requests with different interrupt levels. Finally, the V1 ColdFire core includes the CPUCR[IME] bit that
forces the processor to automatically raise the mask level to 7 during the interrupt exception, removing the
need for any explicit instruction in the service routine to perform this function. For more details, see
ColdFire Family Programmer’s Reference Manual.
8-12
1
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Fault refers to the PC of the instruction that caused the exception. Next refers to the PC
of the instruction that follows the instruction that caused the fault.
Number(s)
103–255
64–102
Vector
15–23
25–31
32–47
48–60
62–63
5–7
10
11
12
13
14
24
61
0
1
2
3
4
8
9
Table 8-6. Exception Vector Assignments
0x03C–0x05C
0x080–0x0BC
0x0F8–0x0FC
0x19C–0x3FC
0x014–0x01C
0x064–0x07C
0x0C0–0x0F0
0x100–0x198
Offset (Hex)
Vector
0x00C
0x02C
0x000
0x004
0x008
0x010
0x020
0x024
0x028
0x030
0x034
0x038
0x060
0x0F4
Program
Stacked
Counter
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Next
Next
Next
Next
Next
—
—
—
—
—
—
—
—
—
Unimplemented line-A opcode
Unimplemented line-F opcode
Initial supervisor stack pointer
Device-specific interrupts
Unsupported instruction
Trap # 0-15 instructions
Initial program counter
Spurious interrupt
Privilege violation
Illegal instruction
Debug interrupt
Address error
Assignment
Access error
Format error
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Trace
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