MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 262

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Internal Clock Source (ICS)
11.3.1
11-8
IREFSTEN
IRCLKEN
IREFS
CLKS
Field
RDIV
7:6
5:3
ICSSC
2
1
0
Reset:
Name
W
R
ICS Control Register 1 (ICSC1)
Clock Source Select — Selects the clock source that controls the bus frequency. The actual bus frequency
depends on the value of the BDIV bits.
00
01
10
11
Reference Divider — Selects the amount to divide down the external reference clock. Resulting frequency must
be in the range 31.25 kHz to 39.0625 kHz. See
Internal Reference Select — The IREFS bit selects the reference clock source for the FLL.
1 Internal reference clock selected.
0 External reference clock selected.
Internal Reference Clock Enable — The IRCLKEN bit enables the internal reference clock for use as
ICSIRCLK.
1 ICSIRCLK active.
0 ICSIRCLK inactive.
Internal Reference Stop Enable — The IREFSTEN bit controls whether or not the internal reference clock
remains enabled when the ICS enters stop mode.
1 Internal reference clock stays enabled in stop if IRCLKEN is set before entering stop.
0 Internal reference clock is disabled in stop.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 1.11
W
R
Output of FLL is selected.
Internal reference clock is selected.
External reference clock is selected.
Reserved, defaults to 00.
7
0
CLKS
7
DRST
Table 11-7. ICS Control Register 1 Field Descriptions
DRS
Table 11-6. ICS Register Summary (continued)
0
6
Figure 11-7. ICS Control Register 1 (ICSC1)
6
Table 11-8. Reference Divide Factor
RDIV
0
1
2
3
0
5
DMX32
5
RANGE=0
1
2
4
8
1
RDIV
IREFST
0
4
Table 11-8
Description
4
RANGE=1
for the divide-by factors.
0
3
128
256
3
32
64
CLKST
IREFS
2
1
2
IRCLKEN
OSCINIT
Freescale Semiconductor
0
1
1
IREFSTEN
FTRIM
0
0
0