MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 522

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

LCD Driver Module
24.2.1
When LCD functionality is enabled by the PEN[43:0] bits in the LCDPEN registers, the corresponding
LCD[43:0] pin will generate a frontplane or backplane waveform depending on the configuration of the
backplane-enable bit field (BPEN[43:0]).
24.2.2
V
generated using the internal charge pump (when enabled). The charge pump can also be configured to
accept V
to a voltage other than V
24.2.3
The charge pump capacitor is used to transfer charge from the input supply to the regulated output. Use a
ceramic capacitor.
24.3
This section consists of register descriptions. Each description includes a standard register diagram.
Details of register bit and field function follow the register diagrams, in bit order.
24.3.1
Read: anytime
Write: LCDEN anytime. Do not change SOURCE LCLCK OR DUTY while LCDEN = 1.
24-6
LL1
Reset
, V
W
R
LL2
LL3
Memory Map and Register Definition
LCDEN
, and V
LCD[43:0]
V
V
LCD Control Register 0 (LCDC0)
as an input and generate V
0
7
LL1
cap1
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
, V
LL3
, V
LL2
SOURCE
cap2
are bias voltages for the LCD module driver waveforms which can be internally
DD
0
= Unimplemented or Reserved
, V
6
. Refer to VSUPPLY[1:0] bits explanation.
LL3
Figure 24-2. LCD Control Register 0 (LCDC0)
LCLK2
0
5
LL1
and V
LCLK1
LL2
0
4
for 3 V glass opperation. V
LCLK0
3
0
DUTY2
0
2
LL3
Freescale Semiconductor
DUTY1
should never be set
1
1
DUTY0
1
0