MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 620

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Version 1 ColdFire Debug (CF1_DEBUG)
The default state of the protocol, after reset, is hardware handshake protocol disabled.
The commands that do not require CPU execution, or that have the status register included in the retrieved
bit stream, do not perform the hardware handshake protocol. Therefore, the target does not respond with
an ACK pulse for those commands even if the hardware protocol is enabled. Conversely, only commands
that require CPU execution and do not include the status byte perform the hardware handshake protocol.
See the third column in
An exception is the ACK_ENABLE command, which does not require CPU execution but responds with
the ACK pulse. This feature can be used by the host to evaluate if the target supports the hardware
handshake protocol. If an ACK pulse is issued in response to this command, the host knows that the target
supports the hardware handshake protocol. If the target does not support the hardware handshake protocol
the ACK pulse is not issued. In this case, the ACK_ENABLE command is ignored by the target, because
it is not recognized as a valid command.
26.4.2
The ColdFire family supports debugging real-time applications. For these types of embedded systems, the
processor must continue to operate during debug. The foundation of this area of debug support is that while
the processor cannot be halted to allow debugging, the system can generally tolerate the small intrusions
with minimal effect on real-time operation.
26.4.3
For the baseline V1 ColdFire core and its single debug signal, support for trace functionality is completely
redefined. The V1 solution provides an on-chip PST/DDATA trace buffer (known as the PSTB) to record
the stream of PST and DDATA values.
As a review, the classic ColdFire debug architecture supports real-time trace via the PST/DDATA output
signals. For this functionality, the following apply:
26-56
ACK_DISABLE — Disables the ACK pulse protocol. In this case, the host should verify the state
of XCSR[CSTAT] to evaluate if there are pending commands and to check if the CPU’s operating
state has changed to or from active background mode via XCSR[31–30].
One (or more) PST value is generated for each executed instruction
Branch target instruction address information is displayed on all non-PC-relative change-of-flow
instructions, where the user selects a programmable number of bytes of target address
— Displayed information includes PST marker plus target instruction address as DDATA
— Captured address creates the appropriate number of DDATA entries, each with 4 bits of address
Optional data trace capabilities are provided for accesses mapped to the slave peripheral bus
— Displayed information includes PST marker plus captured operand value as DDATA
— Captured operand creates the appropriate number of DDATA entries, each with 4 bits of data
Real-Time Debug Support
Trace Support
The details regarding real-time debug support will be supplied at a later
time.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Table 26-25
for the complete enumeration of this function.
NOTE
Freescale Semiconductor

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