MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 407

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The real-time clock interrupt enable register (IRTC_IER) is used to enable/disable the various real-time
clock interrupts. Disabling an interrupt bit has no effect on its corresponding status bit.
Alarm interrupt is set as per the following table.
A single interrupt (ipi_irtc_int_b) is output from the IP which is an ORed version of all the above interrupt.
The CPU should read the status register in the interrupt status routine to determine which interrupt has
occurred.
The tamper detect interrupt enable is an exception as it is enabled after POR. All interrupts enables except
tamper interrupt enable are reset to default state on software reset.
Freescale Semiconductor
TMPR
(IRTC_CTRL[3:2])
Field
STW
Register Bits
1
0
00
01
10
11
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Countdown Timer Expiry Flag, enable disable interrupt
‘1’ – Enable
‘0’ – Disable
Tamper Detect Interrupt, enable disable interrupt
‘1’ – Enable
‘0’ – Disable
NOTE: This interrupt gets enabled on POR and is unaffected by software reset.
Seconds, Minutes and Hours matched
Seconds, Minutes, Hours and Days matched
Seconds, Minutes, Hours, Days and Months matched
Seconds, Minutes, Hours, Days, Months & Year (offset) matched
Table 17-14. IRTC_IER Field Descriptions
Table 17-15. Alarm Match Table
Counters Matched
Description
Independent Robust Real Time Clock (IRTC)
Daily
Monthly
Yearly
One-Time
Alarm Type
17-23