MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 633

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Appendix A
Revision History
This appendix lists major changes between versions of the MCF51EM256 Series ColdFire Integrated
Microcontroller Reference Manual.
A.1
A.2
Freescale Semiconductor
System Control
Interrupts, and
Rapid GPIO
Throughout
Operation
Overview
Overview
Modes of
Chapter
Chapter
Memory
General
Resets,
Device
Device
PDB
Changes Between Rev. 4 and Rev. 5
Changes Between Rev. 5 and Rev. 6
Updated MCU block diagram, removed 32 KB option for flash1 and flash2; removed 4/2 KB options for RAM.
Removed Simplified CF1Core and Low-Cost Platform Block Diagram and its table.
Added a note to
Corrected the register name at 0x(FF)FF_FFF4.
Removed V1 Corefire platform block diagram and related information.
Updated to use the latest PDB block guide.
Corrected the PRACMP pin out to be consistent with those in the
Comparator
Changed the V
Corrected the version of SPI1 module in the
Corrected Bit 0 of ICSSC register, IRTC_CFG_DATA register, Bit 3 of SPR1BR, bits of SPI1S, Bit 6–7 of
SPI2C2; bits of IRTC_TTSR_MY register, Bit 7 of ADCxSC1B register, Bit 5–7 of PDBSC, Bit 14–15 of
PDBCHxCR, LCDBPENx to BPENx, INTCPL6P7 register, INTCPL6P6 register, PRACMP registers, ADCxCFG
registers, ADCxCFG2 registers, ADCxSC2 registers, ADCxSC3 registers in the
in this table changed their names: PDBSCR changed to PDBSC, PDBCOUNT changed to PDBCNT,
PDBIDELAY changed to PDBIDLY, PDBCHnDELA changed to PDBCHnDLYA, PDBCHnDELB changed to
PDBCHnDLYB BPENx to LCDBPENx. Added SOPT2 register, SPICI register. Changed the name of the flash
registers.
Corrected the wakeup pins used to exit from stop2 in
Corrected the PDB interrupts in the
Added
Corrected the Description in the
Changed the Reset to information of bit 2 in the
Corrected the Description of VREF in the
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Section 7.7.7, “System Options 2 Register
(PRACMP).”
DDAD
Table A-1. MCF51EM256RM Rev. 4 to Rev. 5 Changes
Table A-2. MCF51EM256RM Rev. 5 to Rev. 6 Changes
Table
to V
1-7.
DDA
Freescale Confidential Proprietary
and V
Table
SSAD
Table
7-14.
to V
Table
7-1.
Table
SSA
7-16.
Figure 7-11
.
Description
Description
(SOPT2).”
1-4.
Section 6.8.1, “Stop2
and added a figure note to it.
Chapter 25, “Programmable Reference Analog
Mode.”
Table
3-3. Some of the registers
A-1

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