MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 250

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Level
Interrupt Controller (CF1_INTC)
10.3.7
This section provides a two-dimensional view of levels and priorities within the level
The CF1_INTC module implements a sparsely-populated 7 × 9 matrix of levels (7) and priorities within
each level (9). In this representation, the leftmost top cell (level 7, priority 7) is the highest interrupt request
while the rightmost lowest cell (level 1, priority 0) is the lowest interrupt request. The following legend is
used for this table:
10-14
7
6
5
4
VECN
Field
6–0
7
PL6P7
MTIM2_ovfl
16
remapped
9
Reserved, must be cleared.
Vector number. Indicates the appropriate vector number.
For the SWIACK register, it is the highest-level, highest-priority request currently being asserted in the CF1_INTC
module. If there are no pending requests, VECN is zero.
For the LVLnIACK register, it is the highest priority request within the specified level-n. If there are no pending
requests within the level, VECN is 0x18 (24) to signal a spurious interrupt.
SPI1
—
7
Interrupt Request Level and Priority Assignments
Table 10-12. ColdFire [Level][Priority within Level] Matrix Interrupt Assignments
73
80
*
For remapped and forced interrupts, the interrupt source number entry
indicates the register or register field that enables the corresponding
interrupt.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
PL6P6
MTIM3_ovfl
10
17
remapped
Table 10-10. INTC_SWIACK, INTC_LVLnIACK Field Descriptions
SPI2
—
6
74
81
*
MTIM1_ovfl
11
18
4
SPI3
PDB
—
5
Table 10-11. Legend for
68
75
82
TPM1_ch0
12
19
SCI1_err
5
ADC4
Interrupt
Number
Source
—
4
Interrupt Request
Priority within Level
69
76
83
NOTE
Source
Description
Midpoint
IRQ_pin
0
Number
Vector
—
—
—
64
Table 10-12
Low_voltage
TPM1_ch1
13
20
1
6
SCI1_rx
ADC3
3
65
70
77
84
TPM1_ovfl
14
21
7
SCI1_tx
ADC2
—
2
71
78
85
Freescale Semiconductor
15
PDB_err
3
ADC1
(Table
—
—
1
67
79
10-12).
FRC[56]
FRC[57]
FRC[58]
FRC[59]
force_lvl6
force_lvl5
force_lvl4
force_lvl7
0
103
104
105
106