MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 122

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.5.1
4.5.1.1
A valid edge on an enabled port pin sets KBIxSC[KBF]. If KBIxSC[KBIE] is set, an interrupt request is
generated to the CPU. Write a 1 to KBIxSC[KBACK] to clear KBF.
4.5.1.2
A valid edge or level on an enabled port pin sets the KBIxSC[KBF] bit. If KBIxSC[KBIE] is set, an
interrupt request is generated to the CPU. Write a 1 to KBIxSC[KBACK] to clear KBF, provided all
enabled port inputs are at their deasserted levels. KBF remains set if any enabled port pin is asserted while
attempting to clear by writing a 1 to KBACK.
4.5.1.3
The keyboard interrupt pins can be configured to use an internal pullup/pulldown resistor using the
associated I/O port pullup enable register. If an internal resistor is enabled, the KBIxES register is used to
select whether the resistor is a pullup (KBEDG[n] = 0) or a pulldown (KBEDG[n] = 1).
4.5.1.4
When an interrupt pin is first enabled, it is possible to get a false interrupt flag. To prevent a false interrupt
request during pin interrupt initialization, do the following:
4.5.2
Refer to tables in
refers to registers and control bits only by their names.
4-12
1. Mask interrupts by clearing KBIxSC[KBIE].
2. Select the pin polarity by setting the appropriate KBIxES[n] bits.
3. If using internal pullup/pulldown device, configure the associated pull enable bits in PTxPE.
4. Enable the interrupt pins by setting the appropriate KBIxPE[n] bits.
5. Write 1 to KBIxSC[KBACK] to clear any false interrupts.
6. Set KBIxSC[KBIE] to enable interrupts.
Keyboard Functional Considerations
Keyboard Programming Model
Edge Only Sensitivity
Edge and Level Sensitivity
Pullup/Pulldown Resistors
Keyboard Interrupt Initialization
A Freescale Semiconductor-provided equate or header file normally is used
to translate these names into the appropriate absolute addresses.
Register
KBIxSC
KBIxPE
KBIxES
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Chapter 3,
“Memory,” for the absolute address assignments for all registers. This section
Keyboard Interrupt Status & Control Register
Keyboard Interrupt Pin Select Register
Table 4-17. Register Set Summary
KBIx Interrupt Edge Select Register
Description
NOTE
read/write
read/write
read/write
Access
Freescale Semiconductor