MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 600

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Version 1 ColdFire Debug (CF1_DEBUG)
26.4.1.5
Table 26-25
each command. The nomenclature below is used in
commands.
26-36
SYNC
ACK_DISABLE
ACK_ENABLE
BACKGROUND
DUMP_MEM.sz
Command
Mnemonic
Commands begin with an 8-bit hexadecimal command code in the host-to-target direction (most
significant bit first)
/
d
ad24
rd8
rd16
rd32
rd.sz
wd8
wd16
wd32
wd.sz
ss
sz
crn
WS
summarizes the BDM command set. Subsequent paragraphs contain detailed descriptions of
BDM Command Set Summary
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
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Classification
Non-Intrusive
Non-Intrusive
Command
Available
Available
Available
Always
Always
Always
separates parts of the command
delay 32 target BDC clock cycles
24-bit memory address in the host-to-target direction
8 bits of read data in the target-to-host direction
16 bits of read data in the target-to-host direction
32 bits of read data in the target-to-host direction
read data, size defined by sz, in the target-to-host direction
8 bits of write data in the host-to-target direction
16 bits of write data in the host-to-target direction
32 bits of write data in the host-to-target direction
write data, size defined by sz, in the host-to-target direction
the contents of XCSR[31:24] in the target-to-host direction (STATUS)
memory operand size (0b00 = byte, 0b01 = word, 0b10 = long)
core register number
command suffix signaling the operation is with status
Table 26-25. BDM Command Summary
if Enb?
ACK
N/A
Yes
Yes
Yes
No
1
(0x32+4 x sz)/d/rd.sz
Command
Structure
Table 26-25
0x03/d
0x02/d
0x04/d
N/A
2
to describe the structure of the BDM
Dump (read) memory based on operand
Request a timed reference pulse to
determine the target BDC communication
speed
Disable the communication handshake.
This command does not issue an ACK
pulse.
Enable the communication handshake.
Issues an ACK pulse after the command is
executed.
Halt the CPU if ENBDM is set. Otherwise,
ignore as illegal command.
size (sz). Used with READ_MEM to dump
large blocks of memory. An initial
READ_MEM is executed to set up the
starting address of the block and to retrieve
the first result. Subsequent DUMP_MEM
commands retrieve sequential operands.
Description
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