MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 101

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3.4.5.5
The mass erase operation will erase the entire flash array memory using an embedded algorithm.
An example flow to execute the mass erase operation is shown in
write sequence is as follows:
If the flash array memory to be mass erased contains any protected area, the FPVIOL flag in the FxSTAT
register will set and the mass erase command will not launch. Once the mass erase command has
Freescale Semiconductor
1. Write to an aligned flash block address to start the command write sequence for the mass erase
2. Write the mass erase command, 0x41, to the FxCMD register.
3. Clear the FCBEF flag in the FxSTAT register by writing a 1 to FCBEF to launch the mass erase
command. The address and data written will be ignored.
command.
Mass Erase Command
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Clock Register
Written
Check
Bit Polling for
Command Completion
Check
Command
Buffer Empty Check
Access Error and
Protection Violation
Check
Read: FxCDIV register
Figure 3-13. Example Sector Erase Command Flow
2.
3.
1.
yes
FDIVLD
Write: FxCMD register
Sector Erase Command 0x40
Write: FxSTAT register
Clear FCBEF 0x80
Write: Flash Sector Address
and Dummy Data
START
Set?
Read: FxSTAT register
Read: FxSTAT register
FACCERR/FPVIOL
yes
FCBEF
yes
no
FCCF
Set?
EXIT
Write: FxCDIV register
Set?
Set?
no
no
yes
no
Write: FxSTAT register
Clear FACCERR/FPVIOL 0x30
Note: FxCDIV needs to
be set after each reset
Figure
3-14. The mass erase command
Memory
3-45

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