MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 614

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Version 1 ColdFire Debug (CF1_DEBUG)
26.4.1.5.21 WRITE_Rn
If the processor is halted, this command writes the 32-bit operand to the selected CPU general-purpose
register (An, Dn). See
If the processor is not halted, this command is rejected as an illegal operation and no operation is
performed.
26.4.1.5.22 WRITE_XCSR_BYTE
Write the special status byte of XCSR (XCSR[31–24]). This command can be executed in any mode.
26.4.1.5.23 WRITE_CSR2_BYTE
Write the most significant byte of CSR2 (CSR2[31
26.4.1.5.24 WRITE_CSR3_BYTE
Write the most significant byte of CSR3 (CSR3[31
26-50
Write XCSR Status Byte
Write CSR2 Status Byte
Write CSR3 Status Byte
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Write general-purpose CPU register
host →
host →
host →
target
target
target
0x0D
0x0E
0x0F
Table 26-24
0x40+CRN
host →
target
XCSR Data
CSR2 Data
CSR3 Data
[31–24]
[31–24]
[31–24]
host →
host →
host →
target
target
target
for the CRN details when CRG is 01.
Rn data
[31–24]
host →
target
Rn data
[23–16]
host →
target
24]). This command can be executed in any mode.
24]). This command can be executed in any mode.
Rn data
host →
[15–8]
target
Active Background
Rn data
host →
target
[7–0]
Always Available
Always Available
Always Available
D
Y
L
Freescale Semiconductor

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