MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 599

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
MSCMD
MCMD
Field
CRG
CRN
R/W
3–0
3–2
1–0
7–6
4–0
SZ
5
Read/Write.
0 Command is performing a write operation.
1 Command is performing a read operation.
Miscellaneous command. Defines the miscellaneous command to be performed.
0000 No operation
0001 Display the CPU’s program counter (PC) plus optional capture in the PST trace buffer
0010 Enable the BDM acknowledge communication mode
0011 Disable the BDM acknowledge communication mode
0100 Force a CPU halt (background)
1000 Resume CPU execution (go)
1101 Read/write of the debug XCSR most significant byte
1110 Read/write of the debug CSR2 most significant byte
1111 Read/write of the debug CSR3 most significant byte
Memory operand size. Defines the size of the memory reference.
00 8-bit byte
01 16-bit word
10 32-bit long
Memory command. Defines the type of the memory reference to be performed.
00 Simple write if R/W = 0; simple read if R/W = 1
01 Write + status if R/W = 0; read + status if R/W = 1
10 Fill if R/W = 0; dump if R/W = 1
11 Fill + status if R/W = 0; dump + status if R/W = 1
Core register group. Defines the core register group to be referenced.
01 CPU’s general-purpose registers (An, Dn) or PST trace buffer
10 Debug’s control registers
11 CPU’s control registers (PC, SR, VBR, CPUCR,...)
Core register number. Defines the specific core register (its number) to be referenced. All other CRN values are
reserved.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Table 26-24. BDM Command Field Descriptions
CRG
01
10
11
0x00–0x07
0x08–0x0F
0x10–0x1B
Description
DRc[4:0] as described in
0x0E
CRN
0x00
0x01
0x02
0x04
0x05
0x06
0x0F
PST Buffer 0–11
Table 26-4
Version 1 ColdFire Debug (CF1_DEBUG)
OTHER_A7
Register
CPUCR
MACSR
MASK
D0–7
A0–7
VBR
ACC
SR
PC
26-35