MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 417

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.5.23 IRTC Up-Counter Higher Register (IRTC_UP_CNTR_H)
This register serves the purpose of keeping a track of count of an event that the CPU wants to track. For
example the energy units consumed over a period. This register has been indicated as read-only as CPU
can read the contents any time and any write to this register has no effect. The value in this register
increment on rollover from IRTC_UP_CNTR_L. Software reset has no effect on the state of this counter.
17.5.24 IRTC Up-Counter Lower Register (IRTC_UP_CNTR_L)
Freescale Semiconductor
Reset Value
Reset Value
Reset Value
Reset Value
IRTC_UP_CNTR_H
IRTC_UP_CNTR_L
Field
15–0
Bit Type
Bit Type
Bit Type
Bit Type
Field
Field
Field
Field
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Up Counter Register Value. Upper 16-bits of the 32-bit counter. Value increments on rollover from
IRTC_UP_CNTR_L.
Figure 17-24. IRTC Up-Counter Higher Register (IRTC_UP_CNTR_H)
Bit 15
Bit 15
Figure 17-25. IRTC Up-Counter Lower Register (IRTC_UP_CNTR_L)
Bit 7
Bit 7
rw
ro
ro
ro
0
0
0
0
Table 17-26. IRTC_UP_CNTR_H Field Descriptions
Bit 14
Bit 14
Bit 6
Bit 6
rw
ro
ro
ro
0
0
0
0
Bit 13
Bit 13
Bit 5
Bit 5
rw
ro
ro
ro
0
0
0
0
UP COUNTER Upper Word Byte3
UP COUNTER Upper Word Byte2
UP COUNTER Lower Word Byte1
UP COUNTER Lower Word Byte0
Up Counter Higher Register
Up Counter Lower Register
Bit 12
Bit 12
Bit 4
Bit 4
rw
ro
ro
ro
0
0
0
0
Description
Bit 11
Bit 11
Bit 3
Bit 3
rw
ro
ro
ro
0
0
0
0
Bit 10
Bit 10
Bit 2
Bit 2
rw
ro
ro
ro
0
0
0
0
Independent Robust Real Time Clock (IRTC)
Bit 9
Bit 1
Bit 9
Bit 1
rw
ro
ro
ro
0
0
0
0
Bit 8
Bit 0
Bit 8
Bit 0
Offset: 0x34
Offset: 0x32
rw
ro
ro
ro
0
0
0
0
0x32
0x33
0x34
0x35
17-33