MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 178

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
Resets, Interrupts, and General System Control
7.7.2
This high-page register contains status and control bits to support the low voltage detect function, and to
enable the bandgap voltage reference for use by the ADC module. This register should be written during
the user’s reset initialization program to set the desired controls even if the desired settings are the same
as the reset settings.
7-12
LVDF will be set in the case when V
This bit can be written only one time after reset. Additional writes are ignored.
Reset:
LVDACK
BGBDS
LVDRE
LVDSE
LVDIE
BGBE
LVDE
Field
LVDF
7
6
5
4
3
2
1
0
W
R
LVDF
System Power Management Status and Control 1 Register
(SPMSC1)
Low-Voltage Detect Flag — The LVDF bit indicates the low-voltage detect status.
0 Low-voltage detect is not present.
1 Low-voltage detect is present or was present.
Low-Voltage Detect Acknowledge — If LVDF = 1, a low-voltage condition has occurred. To acknowledge this
low-voltage detect, write 1 to LVDACK, which will automatically clear LVDF to 0 if the low-voltage detect is no
longer present.
Low-Voltage Detect Interrupt Enable — This bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF = 1.
Low-Voltage Detect Reset Enable — This write-once bit enables LVDF events to generate a hardware reset
(provided LVDE = 1).
0 LVDF does not generate hardware resets.
1 Force an MCU reset when an enabled low-voltage detect event occurs.
Low-Voltage Detect Stop Enable — Provided LVDE = 1, this read/write bit determines whether the low-voltage
detect function operates when the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
Low-Voltage Detect Enable — This write-once bit enables low-voltage detect logic and qualifies the operation
of other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
Bandgap Buffer Drive Select — This bit is used to select the high drive mode of the bandgap buffer.
0 Bandgap buffer enabled in low drive mode if BGBE = 1.
1 Bandgap buffer enabled in high drive mode if BGBE = 1.
Bandgap Buffer Enable — This bit enables an internal buffer for the bandgap voltage reference for use by the
ADC module on one of its internal channels.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
Figure 7-2. System Power Management Status and Control 1 Register (SPMSC1)
0
7
1
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
LVDACK
0
0
6
Supply
Table 7-5. SPMSC1 Field Descriptions
LVDIE
transitions below the trip point or after reset and V
0
5
LVDRE
1
4
2
Description
LVDSE
3
1
LVDE
1
2
2
Supply
is already below V
Freescale Semiconductor
BGBDS
0
1
BGBE
LVD
0
0
.