MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 450

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Cyclic Redundancy Check (CRC)
20.3.2
The CRC module includes:
Refer to the direct-page register summary in the Memory chapter of this data sheet for the absolute address
assignments for all CRC registers. This section refers to registers only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
20.3.2.1
20-4
TRANSPOSE
CRCH
Field
(offset=2)
Reset
7:0
Name
W
R
A 16-bit CRC result and seed register (CRCH:CRCL)
An 8-bit transpose register to convert from LSb to MSb format (or vice-versa) when required by
the application
CRCH -- This is the high byte of the 16-bit CRC register. A write to CRCH will load the high
byte of the initial 16-bit seed value directly into bits 15-8 of the shift register in the CRC
generator. The CRC generator will then expect the low byte of the seed value to be written to
CRCL and loaded directly into bits 7-0 of the shift register. Once both seed bytes written to
CRCH:CRCL have been loaded into the CRC generator, and a byte of data has been written to
CRCL, the shift register will begin shifting. A read of CRCH will read bits 15-8 of the current
CRC calculation result directly out of the shift register in the CRC generator.
Bit 15
Register Descriptions
CRC High Register (CRCH)
0
7
W
R
Offsets 4,5,6 and 7 are also mapped onto the CRCL register. This is an alias
only used on CF1Core (version 1 of ColdFire core) and should be ignored
for HCS08 cores. See
CF1Core
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Bit 7
7
Bit 14
for more details.
0
6
Bit 6
6
Figure 20-2. CRC High Register (CRCH)
Table 20-2. Register Field Descriptions
Table 20-1. CRC Register Summary
Bit 13
Section 20.4.2, “Programming model extension for
0
5
Bit 5
5
Bit 12
NOTE
0
4
Description
Bit 4
4
Bit 11
3
0
Bit 3
3
Bit 10
2
0
Bit 2
2
Freescale Semiconductor
Bit 9
Bit 1
0
1
1
Bit 8
Bit 0
0
0
0

Related parts for MCF51EM256CLL