MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 145

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.1.3
The RGPIO module does not support any special modes of operation. As a memory-mapped device
located on the processor’s high-speed local bus, it responds based strictly on memory address and does not
consider the operating mode (supervisor, user) of its references.
5.2
5.2.1
As shown in
pin-muxing and pad logic. For a list of the associated RGPIO input/output signals, see
5.2.2
Table 5-2
Freescale Semiconductor
RGPIO[15:0]
— Alternate addresses to perform data set, clear, and toggle functions using simple writes
— Separate read and write programming model views enable simplified driver software
Signal
External Signal Description
provides descriptions of the RGPIO module’s input and output signals.
RGPIO[15:0]
– The two data registers (read, write) are mapped to a single program-visible location
– Support for any access size (byte, word, or longword)
Modes of Operation
Overview
Detailed Signal Descriptions
Figure
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
5-2, the RGPIO module’s interface to external logic is indirect via the device
Signal Name
I/O
I/O Data Input/Output. When configured as an input, the state of this signal is reflected in the read
data register. When configured as an output, this signal is the output of the write data register.
Meaning
Timing
Table 5-2. RGPIO Detailed Signal Descriptions
State
Table 5-1. RGPIO Module External I/O Signals
Asserted—
Negated—
Assertion/Negation—
Input: Indicates the RGPIO pin was sampled as a logic high at the time of
the read.
Output: Indicates a properly-enabled RGPIO output pin is to be driven high.
Input: Indicates the RGPIO pin was sampled as a logic low at the time of the
read.
Output: Indicates a properly-enabled RGPIO output pin is to be driven low.
Input: Anytime. The input signal is sampled at the rising-edge of the
processor’s high-speed clock on the data phase cycle of a read transfer of
this register.
Output: Occurs at the rising-edge of the processor’s high-speed clock on
the data phase cycle of a write transfer to this register. This output is
asynchronously cleared by system reset.
Type
I/O
RGPIO Data Input/Output
Description
Description
Table
Rapid GPIO (RGPIO)
5-1.
5-5