MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 515

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

23.3.1
When VREFEN=0, the Voltage Reference is disabled, all bandgap and buffers are disabled. The Voltage
Reference is in off mode.
23.3.2
When VREFEN=1, the Voltage Reference is enabled, and different modes should be set by the Mode[1:0]
bits.
23.3.2.1
The internal bandgap is on to generate an accurate voltage output that can be trimmed by the bits TRM[7:0]
in 0.5 mV steps. The bandgap requires some time for startup and stabilization. The VREFST bit can be
monitored to determine if the stabilization and startup is complete.
Both low-power buffer and tight-regulation buffer are disabled in this mode, and there is no buffered
voltage output. The Voltage Reference is in standby mode.
23.3.2.2
The internal bandgap is on.
The low-power buffer is enabled to generate a buffered internal voltage. It can be used as a reference to
internal analog peripherals such as an ADC channel or analog comparator input.
23.3.2.3
The internal bandgap is on.
The tight-regulation buffer is enabled to generate a buffered voltage to VREFO with load regulation less
than 100 uV/mA. A 100nF capacitor is required on VREFO pin and it is allowed to drive 10 mA maximum
current. VREFO can be used internally and/or externally.
23.3.2.4
RESERVED
23.4
The Voltage Reference requires some time for startup and stabilization. Once the VREFEN bit is set, the
VREFST bit can be monitored to determine if the stabilization and startup is complete.
When the Voltage Reference is already enabled and stabilized, changing the Mode selection bits
(MODE[1:0]) will not clear the VREFST bit, but there will be some startup time before the output voltage
is stabilized when the low-power buffer or tight-regulation buffer is enabled, and there will be some setting
time when a step change of the load current occurs.
Freescale Semiconductor
Initialization Information
Voltage Reference Disabled, VREFEN=0
Voltage Reference Enabled, VREFEN=1
Mode[1:0]=00
Mode[1:0]=01
Mode[1:0]=10
Mode[1:0]=11
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Voltage Reference (VREF)
23-5