MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 153

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 6
Modes of Operation
6.1
The operating modes of the MCF51EM256 series are described in this chapter. Entry into each mode, exit
from each mode, and functionality while in each of the modes are described.
The overall system mode is generally a function of a number of separate, but inter-related variables: debug
mode, security mode, power mode, and clock mode. Clock modes were discussed in
Modes of Operation”.
6.2
On the MCF51EM256 series, wait, stop2, stop3, and stop4 are all entered via the CPU STOP instruction.
See
Freescale Semiconductor
•
•
•
•
•
•
•
Table
Debug mode for code development. For V1 ColdFire devices, such as MCF51EM256 series, debug
mode is mutually exclusive with use of secure mode (next item).
Secure mode — BDC access to CPU resources is extremely restricted. It is possible to tell that the
device has been secured, and to clear security, which involves mass erasing the on-chip flash
memory. No other CPU access is allowed. Secure mode can be used in conjunction with each of
the power modes below.
Run mode — CPU clocks can be run at full speed and the internal supply is fully regulated.
LPrun mode — CPU and peripheral clocks are restricted to 250 kHz CPU clock and 125 kHz bus
clock maximum and the internal supply is in loose regulation.
Wait mode — CPU shuts down to conserve power; peripheral clocks are running and full
regulation is maintained.
LPwait mode — CPU shuts down to conserve power; peripheral clocks are running at reduced
speed (125 kHz maximum) and the internal voltage regulator is running in loose regulation mode.
Stop modes — System (CPU and peripheral) clocks are stopped.
— Stop4 — All internal circuits are powered (full regulation mode) and internal clock sources still
— Stop3 — All internal circuits are loosely regulated and clocks sources are at minimal values
— Stop2 — Partial power-down of internal circuits; RAM content is retained. The lowest power
Introduction
Features
6-1,
at max frequency for fastest recovery.
(125 kHz maximum), providing a good compromise between power utilization and speed of
recovery.
mode for this device. Upon wakeup from stop2, the MCU will go through a reset sequence,
even if the source of the wakeup was an interrupt.
Figure
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
6-2, and subsequent sections of this chapter for details.
This chapter explores the other dimensions of the system operating mode.
Section 1.3.5, “ICS
6-1