MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 604

IC MCU 32BIT 256KB FLASH 100LQFP

MCF51EM256CLL

Manufacturer Part Number
MCF51EM256CLL
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM256CLL
Manufacturer:
FREESCALE
Quantity:
110
Part Number:
MCF51EM256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Version 1 ColdFire Debug (CF1_DEBUG)
26.4.1.5.4
Provided XCSR[ENBDM] is set (BDM enabled), the BACKGROUND command causes the target MCU
to enter active background (halt) mode as soon as the current CPU instruction finishes. If ENBDM is
cleared (its default value), the BACKGROUND command is ignored.
A delay of 32 BDC clock cycles is required after the BACKGROUND command to allow the target MCU
to finish its current CPU instruction and enter active background mode before a new BDC command can
be accepted.
After the target MCU is reset into a normal operating mode, the host debugger would send a
WRITE_XCSR_BYTE command to set ENBDM before attempting to send the BACKGROUND
command the first time. Normally, the development host would set ENBDM once at the beginning of a
debug session or after a target system reset, and then leave the ENBDM bit set during debugging
operations. During debugging, the host would use GO commands to move from active background mode
to normal user program execution and would use BACKGROUND commands or breakpoints to return to
active background mode.
26.4.1.5.5
26-40
Enter active background mode (if enabled)
Read memory specified by debug address register, then
increment address
BACKGROUND
DUMP_MEM.sz, DUMP_MEM.sz_WS
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
host →
host →
host →
host →
target
target
target
target
0x04
0x32
0x36
0x3A
D
D
D
D
L
Y
L
Y
L
Y
L
Y
data[31-24]
data[15-8]
data[7-0]
target →
target →
target →
Memory
Memory
Memory
host
host
host
data[23-16]
data[7-0]
target →
target →
Memory
Memory
DUMP_MEM.sz
host
host
data[15-8]
target →
Memory
host
data[7-0]
target →
Memory
host
Non-intrusive
Non-intrusive
Freescale Semiconductor

Related parts for MCF51EM256CLL