MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 425

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Independent Robust Real Time Clock (IRTC)
this tamper interrupt when the MCU or application is in Service mode and simply reset the tamper
interrupt. For other conditions it will be taken as a tamper.
Tamper Condition 2: Battery removed when MCU is powered ON: The analog circuitry monitoring
the battery voltage indicates when the battery voltage is removed. This signal is used by the tamper circuit
to indicate a tamper provided MCU power in ON. A flop will be present that will be cleared by CPU during
calibration. Any change of state on this signal will be detected as a tamper.
Tamper Condition 3: Off Chip Tamper Indication:
An external pin on the MCU is also used to monitor tampering external to the MCU. For example, this pin
can be used to indicate that the energy meter unit is opened. Again a flop will be present inside IRTC that
will be cleared by CPU during calibration. High level of this pin will be detected as a tamper.
A tamper filtering circuit is connected to both tamper pins to prevent any glitches triggering the tamper
interrupt. The duration for which a tamper signal should be asserted to be indicated as tamper is
programmable by user in the IRTC control register. The filtered signals are then used to generate the
tamper status and interrupt signals.
Figure 17-30. Tamper Capture Circuit and Timing Diagram
Tamper Detection Flow:
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor
17-41