MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 174

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Resets, Interrupts, and General System Control
Not shown in
These are listed in
Additional details with regard to interrupt processing are present in
(CF1_INTC)”.
The CPU configuration register (CPUCR) within the supervisor programming model will allow the users
to determine if specific ColdFire exception conditions are to generate a normal exception or a system reset.
The default state of the CPUCR will force a system reset for any of the exception types listed in
7-8
64–108
Vector
61
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
24
14
12
11
10
Table 7-2
9
8
4
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Table
Unsupported instruction
Debug breakpoint IRQ
Privileged Violation
Illegal instruction
are the standard set of ColdFire exceptions, many of which apply to this device.
Spurious IRQ
I/O Interrupts
Format error
Illegal LineF
Illegal LineA
7-3.
Exception
Trap #15
Trap #14
Trap #13
Trap #12
Trap #11
Trap #10
Trap #9
Trap #8
Trap #7
Trap #6
Trap #5
Trap #4
Trap #3
Trap #2
Trap #1
Trap #0
Trace
Table 7-3. Exception Types to System Reset
Reset Disabled via CPUCR
CPUCR[30]
CPUCR[30]
CPUCR[30]
CPUCR[30]
CPUCR[30]
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Chapter 10, “Interrupt Controller
Reported using SRS
ilop
ilad
ilop
ilop
ilop
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Freescale Semiconductor
Table
7-3.