MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 185

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.7.9
This register contains control bits to enable or disable the bus clock to the SCI, IIC and ADC modules on
the chip. Gating off the clocks to unused peripherals is used to reduce the microcontroller’s run and wait
currents. See
Freescale Semiconductor
Reset:
Reset:
ID[11:8]
ID[7–0]
ADC4
ADC3
Field
Field
Field
REV
7–4
3–0
7–0
7
6
W
W
R
R
ADC4
System Clock Gating Control 1 Register (SCGC1)
Revision Number. This field indicates the chip revision number.
Part Identification Number — Each derivative in the ColdFire family has a unique identification number. The
MCF51EM series microcontrollers have these bits hard coded to the value 0xC. See also ID bits in
ID7
Part Identification Number — Each derivative in the ColdFire family has a unique identification number.
MCF51EM256 Series devices have the following values in these fields:
0x01 = MCF51EM32 development device
0x02 = MCF51EM256 / MCF51EM128
ADC 4 Clock Gate Control — This bit controls the clock gate to the ADC 4 module.
0 Bus clock to the ADC 4 module is disabled.
1 Bus clock to the ADC 4vmodule is enabled.
ADC 3 Clock Gate Control — This bit controls the clock gate to the ADC 3 module.
0 Bus clock to the ADC 3 module is disabled.
1 Bus clock to the ADC 3 module is enabled.
0
Section 7.6, “Peripheral Clock Gating,”
1
7
7
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure 7-9. System Device Identification Register — Low (SDIDL)
Figure 7-10. System Clock Gating Control 1 Register (SCGC1)
ADC3
ID6
0
1
6
6
Table 7-15. SCGC1 Bit Field Descriptions
Table 7-13. SDIDH Bit Field Descriptions
Table 7-14. SDIDL Bit Field Descriptions
ADC2
ID5
0
1
5
5
ADC1
ID4
0
1
4
4
Description
Description
Description
for more information.
ID3
IIC
3
0
3
1
Resets, Interrupts, and General System Control
SCI3
ID2
0
0
2
2
0 or 1
SCI2
ID1
1
1
1
Table
0 or 1
SCI1
ID0
1
0
0
7-14.
7-19