MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 306

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16-Bit Serial Peripheral Interface (SPI16)
13.4.4
SPI works in FIFO mode when SPIxC3[0] bit is set. When in FIFO mode SPI RX buffer and SPI TX buffer
is replaced by a 8 byte deep fifo as shown in figure above.
13-20
SPI FIFO MODE
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Figure 13-14. SPIDH:L read side structural overview in FIFO mode
SPI_CORE_SHFR
SPI_REG_BLOCK
Figure 13-15. SPIDH:L write side structural overview in FIFO mode
Read
Control
SPI Data Register
FIFO Ctrlr
Read Access
FIFO Ctrlr
Control
Load
Write Access
spidh:l_rx_reg
shfr_rx_reg
spidh:l_tx_reg
shfr_tx_reg
RX- FIFO
IPBus (ips_rdata[7:0])
FIFO depth = 8 bytes
IPBus (ips_wdata)
TX FIFO
FIFO depth = 8 bytes
SPI_CORE_SHFR
SPI Data Register
SPI_REG_BLOCK
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