MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 152

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Rapid GPIO (RGPIO)
00510: 4fef fff4
00514: 48d7 008c
00518: 3439 0080 0582
0051e: 760f
00520: 7e10
00522: 207c 00c0 0003
00528: 203c 0000 ffff
0052e: 3140 fffd
00532: 3140 0001
00536: 223c 0001 0000
0053c: 2001
0053e: e6a8
00540: 5880
00542: 1080
00544: 6002
00548: 3202
0054a: 2001
0054c: e6a8
0054e: 1080
00550: 5880
00552: e38a
00554: 51fc
00556: 51fc
00558: 51fc
0055a: 51fc
0055c: 1080
0055e: 5387
00560: 66e6
00562: c0bc 0000 fff5
00568: 1080
0056a: 4cd7 008c
0056e: 4fef 000c
00572: 4e75
The resulting SPI performance, as measured in the effective Mbps transmission rate for the 16-bit message,
is shown in
5-12
Table
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
5-12.
Table 5-12. Emulated SPI Performance using GPIO Outputs
Peripheral Bus-mapped GPIO
L%1:
CPU f = 50 MHz
SPI Speed @
2.063 Mbps
lea
movm.l
mov.w
movq.l
movq.l
mov.l
mov.l
mov.w
mov.w
mov.l
mov.l
lsr.l
addq.l
mov.b
bra.b
align
mov.w
mov.l
lsr.l
mov.b
addq.l
lsl.l
tpf
tpf
tpf
tpf
mov.b
subq.l
bne.b
and.l
mov.b
movm.l
lea
rts
Figure 5-10. GPIO SPI Code Example
-12(%sp),%sp
&0x8c,(%sp)
RAM_BASE+message2,%d2
&15,%d3
&16,%d7
&RGPIO_DATA+1,%a0
&0xffff,%d0
%d0,-3(%a0)
%d0,1(%a0)
&0x10000,%d1
%d1,%d0
%d3,%d0
&4,%d0
%d0,(%a0)
L%1
4
%d2,%d1
%d1,%d0
%d3,%d0
%d0,(%a0)
&4,%d0
&1,%d2
%d0,(%a0)
&1,%d7
L%1
&0xfff5,%d0
%d0,(%a0)
(%sp),&0x8c
12(%sp),%sp
Relative
Speed
1.00x
CPU f = 50 MHz
SPI Speed @
3.809 Mbps
RGPIO
# allocate stack space
# save d2,d3,d7
# static shift count
# message bit length
# pointer to low-order data byte
# data value for _ENB and _DIR regs
# set RGPIO_DIR register
# set RGPIO_ENB register
# d1[17:16] = {clk, cs}
# copy into temp reg
# align in d0[2:0]
# set clk = 1
# initialize data
# d1[17:15] = {clk, cs, data}
# copy into temp reg
# align in d0[2:0]
# transmit data with clk = 0
# force clk = 1
# d2[15] = new message data bit
# preserve 50% duty cycle
# transmit data with clk = 1
# decrement loop counter
# negate chip-select
# update gpio
# restore d2,d3,d7
# deallocate stack space
# get 16-bit message
Relative
Speed
1.29x
Freescale Semiconductor