MCF51EM256CLL Freescale Semiconductor, MCF51EM256CLL Datasheet - Page 494

• Manufacturer Part Number: MCF51EM256CLL
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM256CLL

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOEM
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Analog-to-Digital Converter (S08ADC16)
If a conversion is in progress when the MCU enters stop3 mode, it continues until completion. Conversions
can be initiated while the MCU is in stop3 mode by means of the hardware trigger or if continuous
conversions are enabled.
If the compare and hardware averaging functions are disabled, a conversion complete event sets the
COCOn and generates an ADC interrupt to wake the MCU from stop3 mode if the respective ADC
interrupt is enabled (AIENn = 1). The result register will contain the data from the first completed
conversion that occurred during stop3 mode. If the hardware averaging function is enabled the COCOn
will set (and generate an interrupt if enabled) when the selected number of conversions are complete. If
the compare function is enabled the COCOn will set (and generate an interrupt if enabled) only if the
compare conditions are met. If a single conversion is selected and the compare is not true, the ADC will
return to its idle state and cannot wake the MCU from stop3 mode unless a new conversion is initiated by
another hardware trigger.
21.5.12 MCU Stop2 Mode Operation
The ADC module is automatically disabled when the MCU enters stop2 mode. All module registers
contain their reset values following exit from stop2. Therefore, the module must be re-enabled and
re-configured following exit from stop2.
21.6
This section gives an example that provides some basic direction on how to initialize and configure the
ADC module. You can configure the module for 8-, 10-, 12-, or 16-bit single-ended resolution or 9-, 11-,
13-, or 16-bit differential resolution, single or continuous conversion, and a polled or interrupt approach,
among many other options. Refer to
example.
21-38
Initialization Information
The ADC module can wake the system from low-power stop and cause the
MCU to begin consuming run-level currents without generating a system
level interrupt. To prevent this scenario, software should ensure the
conversion result data transfer blocking mechanism (discussed in
21.5.5.2, “Completing
continuing ADC conversions.
Hexadecimal values designated by a preceding 0x, binary values designated
by a preceding %, and decimal values have no preceding character.
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
Table
Conversions) is cleared when entering stop3 and
21-6,
Table
NOTE
NOTE
21-7, and
Table 21-8
for information used in this
Section
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