R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 980

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 19 Controller Area Network (RCAN-TL1)
• BCR0 (Address = H'006)
Bits 8 to 15: Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bits 7 to 0—Baud Rate Pre-scale (BRP[7:0] = BCR0 [7:0]): These bits are used to define the
peripheral bus clock periods contained in a Time Quantum.
• Requirements of Bit Configuration Register
SYNC_SEG:
PRSEG:
PHSEG1:
PHSEG2:
TSEG1:
Rev. 3.00 Sep. 28, 2009 Page 948 of 1650
REJ09B0313-0300
Bit 7:
BRP[7]
0
0
0
:
:
1
Initial value:
R/W:
Bit:
Bit 6:
BRP[6]
0
0
0
:
:
1
15
R
0
-
Segment for establishing synchronisation of nodes on the CAN bus. (Normal bit
edge transitions occur in this segment.)
Segment for compensating for physical delay between networks.
Buffer segment for correcting phase drift (positive). (This segment is extended
when synchronisation (resynchronisation) is established.)
Buffer segment for correcting phase drift (negative). (This segment is shortened
when synchronisation (resynchronisation) is established)
TSG1 + 1
14
R
0
Bit 5:
BRP[5]
0
0
0
:
:
1
-
SYNC_SEG
13
R
0
-
1
Bit 4:
BRP[4]
0
0
0
:
:
1
12
R
0
-
11
R
0
-
PRSEG
Bit 3:
BRP[3]
0
0
0
:
:
1
1-bit time (8-25 quanta)
10
R
0
-
TSEG1
4-16
Bit 2:
BRP[2]
0
0
0
:
:
1
R
9
0
-
PHSEG1
R
8
0
-
Bit 1:
BRP[1]
0
0
1
:
:
1
R/W
7
0
R/W
TSEG2
6
0
2-8
Bit 0:
BRP[0] Description
0
1
0
:
:
1
R/W
5
0
Quantum
R/W
2 X peripheral bus clock
(Initial value)
4 X peripheral bus clock
6 X peripheral bus clock
2*(register value + 1) X
peripheral bus clock
512 X peripheral bus clock
4
0
BRP[7:0]
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0