R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 665

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

(1)
Figure 11.113 shows an explanatory diagram of the case where an error occurs in normal mode
and operation is restarted in normal mode after re-setting.
MTU2 module output
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The count operation is stopped by TSTR.
11. Not necessary when restarting in normal mode.
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
After a reset, MTU2 output is low and ports are in the high-impedance state.
After a reset, the TMDR setting is for normal mode.
For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
Set MTU2 output with the PFC.
The count operation is started by TSTR.
Output goes low on compare-match occurrence.
An error occurs.
Set port output with the PFC and output the inverse of the active level.
Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Normal Mode
Figure 11.113 Error Occurrence in Normal Mode, Recovery in Normal Mode
Port output
n = 0 to 15
TIOC*A
TIOC*B
PEn
PEn
RESET
1
(normal)
TMDR
2
TOER
Hi-Z
Hi-Z
(1)
3
0 out)
TIOR
(1 init
4
(MTU2)
PFC
5
TSTR
(1)
6
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Match
7
occurs
Error
8
Rev. 3.00 Sep. 28, 2009 Page 633 of 1650
(PORT)
PFC
9
TSTR
(0)
10
(normal)
TMDR
11
0 out)
TIOR
(1 init
12
REJ09B0313-0300
(MTU2)
PFC
13
TSTR
(1)
14