R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1152

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Rev. 3.00 Sep. 28, 2009 Page 1120 of 1650
REJ09B0313-0300
Bit
12
11, 10
9
8
Bit Name
DREQE
MBW[1:0]
TRENB
TRCLR
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W*
1
Description
DMA Transfer Request Enable
0: Request disabled
1: Request enabled
FIFO Port Access Bit Width
00: 8-bit width
01: 16-bit width
10: 32-bit width
11: Setting prohibited
When the selected CURPIPE is set to the buffer
memory read direction, set these bits and the
CURPIPE bits simultaneously.
For details, see 23.4.4, Buffer Memory.
Note: Once reading from the buffer memory is
Transaction Counter Enable
This bit is valid when the receiving direction (reading
from the buffer memory) has been set for the pipe
specified by the CURPIPE bits.
0: Transaction counter function is invalid.
1: Transaction counter function is valid.
Transaction Counter Clear
This bit is valid when the receiving direction (reading
from the buffer memory) has been set for the pipe
specified by the CURPIPE bits.
0: Invalid
1: The current count is cleared.
started, the access bit width of the FIFO port
cannot be changed until all of the data has
been read. Also, the bit width cannot be
changed from the 8-bit width to the 16-/32-bit
width or from the 16-bit width to the 32-bit width
while data is being written to the buffer
memory.