R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1250

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 23 USB 2.0 Host/Function Module (USB)
23.4.7
This module carries out interrupt transfers in accordance with the timing controlled by the host
controller. For interrupt transfers, PING packets are ignored (no responses are sent), and the ACK,
NAK, and STALL responses are carried out without an NYET handshake response being made.
This module does not support high bandwidth transfers of interrupt transfers.
(1)
For interrupt transfers, intervals between transactions are set in the IITV bits in PIPEPERI. This
controller issues an interrupt transfer token based on the specified intervals.
(a)
This controller initializes the interval counter under the following conditions.
• Power-on reset:
• Software reset:
• Buffer memory initialization using the ACLRM bit:
Note that the interval counter is not initialized in the following case.
• USB bus reset, USB suspended:
(b)
This module cannot issue tokens even at token issuance timing in the following cases. In such a
case, this module attempts transactions at the subsequent interval.
• When the PID is set to NAK or STALL.
• When the buffer memory is full at the token sending timing in the receiving (IN) direction.
• When there is no data to be sent in the buffer memory at the token sending timing in the
Rev. 3.00 Sep. 28, 2009 Page 1218 of 1650
REJ09B0313-0300
The IITV bits are initialized.
The IITV bits are initialized.
The IITV bits are not initialized but the count value is. Setting the ACLRM bit to 0 starts
counting from the value set in the IITV bits.
The IITV bits are not initialized. Setting 1 to the UACT bit starts counting from the value
before entering the USB bus reset state or USB suspended state.
sending (OUT) direction.
Interval Counter during Interrupt Transfers when the Host Controller Function is
Selected
Counter Initialization
Operation when Transmission/Reception is Impossible at Token Issuance Timing
Interrupt Transfers (PIPE6 and PIPE7)

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