R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 11

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 1 Overview................................................................................................1
1.1
1.2
1.3
1.4
1.5
1.6
Section 2 CPU......................................................................................................47
2.1
2.2
2.3
2.4
2.5
SH7203 Features.................................................................................................................... 1
Product Lineup....................................................................................................................... 9
Block Diagram ..................................................................................................................... 10
Pin Arrangement .................................................................................................................. 11
Pin Functions ....................................................................................................................... 12
Pin Assignments................................................................................................................... 22
Register Configuration......................................................................................................... 47
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
Data Formats........................................................................................................................ 52
2.2.1
2.2.2
2.2.3
Instruction Features.............................................................................................................. 54
2.3.1
2.3.2
2.3.3
Instruction Set ...................................................................................................................... 67
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.4.8
2.4.9
2.4.10 Bit Manipulation Instructions ................................................................................. 88
Processing States.................................................................................................................. 90
General Registers .................................................................................................... 47
Control Registers .................................................................................................... 48
System Registers..................................................................................................... 50
Register Banks ........................................................................................................ 51
Initial Values of Registers....................................................................................... 51
Data Format in Registers ........................................................................................ 52
Data Formats in Memory ........................................................................................ 52
Immediate Data Format .......................................................................................... 53
RISC-Type Instruction Set...................................................................................... 54
Addressing Modes .................................................................................................. 58
Instruction Format................................................................................................... 63
Instruction Set by Classification ............................................................................. 67
Data Transfer Instructions....................................................................................... 73
Arithmetic Operation Instructions .......................................................................... 77
Logic Operation Instructions .................................................................................. 80
Shift Instructions..................................................................................................... 81
Branch Instructions ................................................................................................. 82
System Control Instructions.................................................................................... 83
Floating-Point Operation Instructions..................................................................... 85
FPU-Related CPU Instructions ............................................................................... 87
Contents
Rev. 3.00 Sep. 28, 2009 Page ix of xxx
REJ09B0313-0300