R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 884

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 17 I
17.4
The I
mode by setting FS in SAR.
17.4.1
Figure 17.3 shows the I
following a start condition always consists of eight bits.
[Legend]
S:
SLA:
R/W:
A:
DATA: Transfer data
P:
Rev. 3.00 Sep. 28, 2009 Page 852 of 1650
REJ09B0313-0300
SDA
SCL
(a) I
(b) I
S
S
1
1
2
2
2
C bus interface 3 can communicate either in I
C bus format (FS = 0)
C bus format (Start condition retransmission, FS = 0)
S
Indicates the direction of data transfer: from the slave device to the master device when
Start condition. The master device drives SDA from high to low while SCL is high.
Slave address
Acknowledge. The receive device drives SDA to low.
Stop condition. The master device drives SDA from low to high while SCL is high.
R/W is 1, or from the master device to the slave device when R/W is 0.
Operation
I
SLA
SLA
2
C Bus Format
7
2
7
C Bus Interface 3 (IIC3)
SLA
1-7
1
1
R/W
R/W
1
1
2
C bus formats. Figure 17.4 shows the I
R/W
8
A
A
1
1
DATA
DATA
A
9
n1
Figure 17.3 I
n
Figure 17.4 I
m1
A
1
A/A
1-7
1
m
DATA
S
1
2
C Bus Formats
2
C Bus Timing
2
C bus mode or clocked synchronous serial
8
SLA
7
A/A
n1 and n2: Transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: Transfer frame count (m1 and m2 ≥ 1)
1
A
9
1
2
R/W
P
C bus timing. The first frame
1
1
A
1
1-7
DATA
n: Transfer bit count (n = 1 to 8)
m: Transfer frame count (m ≥ 1)
DATA
n2
m2
8
A
9
A/A
1
P
1
P