R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 893

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

17.4.6
This module can be operated with the clocked synchronous serial format, by setting the FS bit in
SAR to 1. When the MST bit in ICCR1 is 1, the transfer clock output from SCL is selected. When
MST is 0, the external clock input is selected.
(1)
Figure 17.13 shows the clocked synchronous serial transfer format.
The transfer data is output from the fall to the fall of the SCL clock, and the data at the rising edge
of the SCL clock is guaranteed. The MLS bit in ICMR sets the order of data transfer, in either the
MSB first or LSB first. The output level of SDA can be changed during the transfer wait, by the
SDAO bit in ICCR2.
(Master output)
(Master output)
(Slave output)
(Slave output)
processing
ICDRS
ICDRR
RDRF
SCL
Data Transfer Format
SDA
SCL
SDA
User
Clocked Synchronous Serial Format
Figure 17.13 Clocked Synchronous Serial Transfer Format
Figure 17.12 Slave Receive Mode Operation Timing (2)
SCL
SDA
A
9
Bit 7
1
Bit 0
Bit 6
Data 1
Bit 1 Bit 2 Bit 3 Bit 4
2
Bit 5
3
Bit 4
4
Bit 3
5
[3] Set ACKBT
Bit 5 Bit 6
Bit 2
6
Rev. 3.00 Sep. 28, 2009 Page 861 of 1650
Bit 1
7
Section 17 I
Bit 7
[3] Read ICDRR
Bit 0
8
A
2
C Bus Interface 3 (IIC3)
REJ09B0313-0300
9
[4] Read ICDRR
Data 1
Data 2