R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 50

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 1 Overview
Rev. 3.00 Sep. 28, 2009 Page 18 of 1650
REJ09B0313-0300
Classification
Controller area
network
(RCAN-TL1)
AND/NAND
flash memory
controller
(FLCTL)
Symbol
CTx0, CTx1
CRx0, CRx1
FOE
FSC
FCE
FCDE
FRB
FWE
NAF7 to NAF0
I/O
O
I
O
O
O
O
I
O
I/O
Name
CAN bus transmit
data
CAN bus receive
data
Flash memory
output enable
Flash memory
serial clock
Flash memory
chip enable
Flash memory
command data
enable
Flash memory
ready/busy
Flash memory
write enable
Flash memory
data
Function
Output pin for transmit data on the
CAN bus.
Output pin for receive data on the
CAN bus.
Address latch enable: Asserted for
address output and negated for data
I/O.
Output enable: Asserted for data
input/status read.
Read enable: Reads data at falling
edge.
Serial clock: Inputs/outputs data in
synchronization with the signal.
Chip enable: Enables the flash
memory connected to this LSI.
Command latch enable: Asserted at
command output.
Command data enable: Asserted at
command output.
Ready/busy: High level indicates
ready state and low level indicates
busy state.
Write enable: Flash memory latches
commands, addresses, and data at
rising edge.
Data I/O pins.

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