R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1302

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 24 LCD Controller (LCDC)
Figure 24.2 shows the valid display and the retrace period.
24.4.2
This LCDC is capable of displaying a landscape-format image on a LCD module by rotating a
portrait format image for display by 90 degrees. Only the numbers of colors for each resolution are
supported as shown in tables 24.4 and 24.5. The size of the SDRAM (the number of column
address bits) and its burst length are limited to read the SDRAM continuously.
The number of colors for display, SDRAM column addresses, and LCDC burst length are shown
tables 24.4 and 24.5.
A monochromatic LCD module is necessary for the display of images in the above
monochromatic formats. A color LCD module is necessary for the display of images in the above
color formats.
Rev. 3.00 Sep. 28, 2009 Page 1270 of 1650
REJ09B0313-0300
Limits on the Resolution of Rotated Displays, Burst Length, and Connected
Memory (SDRAM)
Hsync Signal
Active Video =Top/Left Border + Addressable Video + Bottom/Right Border
Total H Blank = Hsync Time + Back Porch + Front Porch
Total V Blank = Vsync Time + Back Porch + Front Porch
HTCN = H Total Time
HDCN = H Addressable Video
HSYNP = H Addressable Video + Right Border + Front Porch
HSYNW = Hsync Time
VTLN = V Total Time
VDLN = V Addressable Video
VSYNP = V Addressable Video + Bottom Border + Front porch
VSYNW = Vsync Time
Figure 24.2 Valid Display and the Retrace Period
H AddressableVideo
H Total Time
Back Porch
Top Border
V Addressable
Video
Bottom Border
Vsync Time
Front Porch