R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1009

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Bits 5 to 0 — RCAN-TL1 Timer Prescaler (TPSC[5:0]): This control field allows the timer
source clock (4*[RCAN-TL1 system clock]) to be divided before it is used for the timer. This
function is available only in event-trigger mode. In time trigger mode (CMAX is not 3'b111), one
nominal Bit Timing (= one bit length of CAN bus) is automatically chosen as source clock of
TCNTR.
The following relationship exists between source clock period and the timer period.
(2)
This register is a 16-bit read/write register. CMAX specifies the maximum value for the cycle
counter (CCR) for TT Transmissions to set the number of basic cycles in the matrix system. When
the Cycle Counter reaches the maximum value (CCR = CMAX), after a full basic cycle, it is
cleared to zero and an interrupt is generated on IRR.10.
TEW specifies the width of Tx-Enable window.
• CMAX_TEW (Address = H'084)
Bits 15 to 11: Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bit[5:0]: TPSC[5:0]
0 0 0 0 0 0
0 0 0 0 0 1
0 0 0 0 1 0
0 0 0 0 1 1
0 0 0 1 0 0
. . . . . .
. . . . . .
1 1 1 1 1 1
Initial value:
Cycle Maximum/Tx-Enable Window Register (CMAX_TEW)
R/W:
Bit:
15
R
0
-
14
R
0
-
13
R
0
-
Description
1 X Source Clock (initial value)
2 X Source Clock
3 X Source Clock
4 X Source Clock
5 X Source Clock
. . . . . .
. . . . . .
64 X Source Clock
12
R
0
-
11
R
0
-
R/W
10
1
CMAX[2:0]
R/W
9
1
R/W
8
1
Section 19 Controller Area Network (RCAN-TL1)
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 977 of 1650
R
6
0
-
R
5
0
-
R
4
0
-
R/W
3
0
R/W
REJ09B0313-0300
2
0
TEW[3:0]
R/W
1
0
R/W
0
0

Related parts for R0K572030S000BE